Arkady Bramnik

According to our database, Arkady Bramnik authored at least 9 papers between 2013 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A Real-Time Error Detection (RTD) Architecture and Its Use for Reliability and Post-Silicon Validation for F/F Based Memory Arrays.

Yiannakis Sazeides, Arkady Bramnik, Ron Gabor, Ramon Canal

IEEE Trans. Emerg. Top. Comput., 2022

IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming.

Yiannakis Sazeides, Alex Gerber, Ron Gabor, Arkady Bramnik, George Papadimitriou, Dimitris Gizopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Karyofyllis Patsidis

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2021

SRAM Arrays with Built-in Parity Computation for Real-Time Error Detection in Cache Tag Arrays.

Ramon Canal, Yiannakis Sazeides, Arkady Bramnik

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD).

Yiannakis Sazeides, Arkady Bramnik, Ron Gabor, Chrysostomos Nicopoulos, Ramon Canal, Dimitris Konstantinou, Giorgos Dimitrakopoulos

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

2019

Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core.

Ron Gabor, Yiannakis Sazeides, Arkady Bramnik, Alexandros Andreou, Chrysostomos Nicopoulos, Karyofyllis Patsidis, Dimitris Konstantinou, Giorgos Dimitrakopoulos

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

To Detect or to Correct?

Arkady Bramnik, Yiannakis Sazeides

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

Don't Correct the Tags in a Cache, Just Check Their Hamming Distance from the Lookup Tag.

Alex Gendler, Arkady Bramnik, Ariel Szapiro, Yiannakis Sazeides

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2015

Flip-flop SEU reduction through minimization of the temporal vulnerability factor (TVF).

Adrian Evans, Enrico Costenaro, Arkady Bramnik

Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

2013

Timing vulnerability factors of sequential elements in modern microprocessors.

Arkady Bramnik, Andrei Sherban, Norbert Seifert

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013