Ayose Falcón

According to our database1, Ayose Falcón authored at least 19 papers between 2002 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Shared resource aware scheduling on power-constrained tiled many-core processors.
J. Parallel Distributed Comput., 2017

2015
Chrysso: an integrated power manager for constrained many-core processors.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014
Author retrospective for software trace cache.
Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014

2009
DIA: A Complexity-Effective Decoding Architecture.
IEEE Trans. Computers, 2009

COTSon: infrastructure for full system simulation.
ACM SIGOPS Oper. Syst. Rev., 2009

How to simulate 1000 cores.
SIGARCH Comput. Archit. News, 2009

High-speed network modeling for full system simulation.
Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009

2008
An Adaptive Synchronization Technique for Parallel Simulation of Networked Clusters.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008

2007
Combining Simulation and Virtualization through Dynamic Sampling.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

2006
Branch predictor guided instruction decoding.
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006

2005
Better Branch Prediction Through Prophet/Critic Hybrids.
IEEE Micro, 2005

Effective Instruction Prefetching via Fetch Prestaging.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

A Complexity-Effective Simultaneous Multithreading Architecture.
Proceedings of the 34th International Conference on Parallel Processing (ICPP 2005), 2005

2004
A latency-conscious SMT branch prediction architecture.
Int. J. High Perform. Comput. Netw., 2004

Prophet/Critic Hybrid Branch Prediction.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading Processors.
Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004

2003
Tolerating Branch Predictor Latency on SMT.
Proceedings of the High Performance Computing, 5th International Symposium, 2003

2002
A Comprehensive Analysis of Indirect Branch Prediction.
Proceedings of the High Performance Computing, 4th International Symposium, 2002

Studying New Ways for Improving Adaptive History Length Branch Predictors.
Proceedings of the High Performance Computing, 4th International Symposium, 2002


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