Juan C. Moure

IEEE Trans. Parallel Distributed Syst., 2021

Real-time 16K video coding on a GPU with complexity scalable BPC-PaCo.

[BibT_eX]

[DOI]

Signal Process. Image Commun., 2021

Massively-parallel column-level segmentation of depth images.

[BibT_eX]

[DOI]

Pau Cebrian

J. Comput. Sci., 2021

OpenCL-based FPGA Accelerator for Semi-Global Approximate String Matching Using Diagonal Bit-Vectors.

[BibT_eX]

[DOI]

David Castells-Rufas

Santiago Marco-Sola

Quim Aguado-Puig

Antonio Espinosa-Morales

Lluc Alvarez

Miquel Moretó

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020

Complexity Scalable Bitplane Image Coding With Parallel Coefficient Processing.

[BibT_eX]

[DOI]

IEEE Signal Process. Lett., 2020

GPU-Oriented Architecture for an End-to-End Image/Video Codec Based on JPEG2000.

[BibT_eX]

[DOI]

IEEE Access, 2020

GPU-Accelerated RDP Algorithm for Data Segmentation.

[BibT_eX]

[DOI]

Pau Cebrian

Proceedings of the Computational Science - ICCS 2020, 2020

2019

Slanted Stixels: A Way to Represent Steep Streets.

[BibT_eX]

[DOI]

Int. J. Comput. Vis., 2019

GPU Architecture for Wavelet-Based Video Coding Acceleration.

[BibT_eX]

[DOI]

Proceedings of the Parallel Computing: Technology Trends, 2019

2018

High Throughput Image Codec for High-Resolution Satellite Images.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Geoscience and Remote Sensing Symposium, 2018

2017

GPU Implementation of Bitplane Coding with Parallel Coefficient Processing for High Performance Image Compression.

[BibT_eX]

[DOI]

Francesc Auli-Llinas

IEEE Trans. Parallel Distributed Syst., 2017

Introducing computational thinking, parallel programming and performance engineering in interdisciplinary studies.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2017

Coalition structure generation problems: optimization and parallelization of the IDP algorithm in multicore systems.

[BibT_eX]

[DOI]

Francisco Cruz-Mencia

Juan A. Rodríguez-Aguilar

Jesús Cerquides

Kim Svensson

Sarvapali D. Ramchurn

Concurr. Comput. Pract. Exp., 2017

GPU-Accelerated Real-Time Stixel Computation.

[BibT_eX]

[DOI]

Antonio Manuel López Peña

David Vázquez

Proceedings of the 2017 IEEE Winter Conference on Applications of Computer Vision, 2017

Slanted Stixels: Representing San Francisco's Steepest Streets.

[BibT_eX]

[DOI]

Proceedings of the British Machine Vision Conference 2017, 2017

2016

Bitplane Image Coding With Parallel Coefficient Processing.

[BibT_eX]

[DOI]

IEEE Trans. Image Process., 2016

Embedded Real-time Stereo Estimation via Semi-Global Matching on the GPU.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science 2016, 2016

GPU-based Pedestrian Detection for Autonomous Driving.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science 2016, 2016

2015

Implementation of the DWT in a GPU through a Register-based Strategy.

[BibT_eX]

[DOI]

Francesc Auli-Llinas

IEEE Trans. Parallel Distributed Syst., 2015

Boosting the FM-Index on the GPU: Effective Techniques to Mitigate Random Memory Access.

[BibT_eX]

[DOI]

IEEE ACM Trans. Comput. Biol. Bioinform., 2015

Strategies of SIMD Computing for Image Coding in GPU.

[BibT_eX]

[DOI]

Francesc Auli-Llinas

Proceedings of the 22nd IEEE International Conference on High Performance Computing, 2015

Teaching Parallel Programming in Interdisciplinary Studies.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2015: Parallel Processing Workshops, 2015

Strategy of Microscopic Parallelism for Bitplane Image Coding.

[BibT_eX]

[DOI]

Proceedings of the 2015 Data Compression Conference, 2015

Parallelisation and Application of AD 3 as a Method for Solving Large Scale Combinatorial Auctions.

[BibT_eX]

[DOI]

Francisco Cruz-Mencia

Jesús Cerquides

Juan Antonio Rodríguez-Aguilar

Proceedings of the Coordination Models and Languages, 2015

Paving the way for Large-Scale Combinatorial Auctions.

[BibT_eX]

[DOI]

Francisco Cruz-Mencia

Jesús Cerquides

Juan Antonio Rodríguez-Aguilar

Proceedings of the 2015 International Conference on Autonomous Agents and Multiagent Systems, 2015

2014

Improving the Execution Performance of FreeSurfer - A New Scheduled Pipeline Scheme for Optimizing the Use of CPU and GPU Resources.

[BibT_eX]

[DOI]

Jordi Delgado

Yolanda Vives-Gilabert

M. Delfino-Reznicek

B. Gómez-Ansón

Neuroinformatics, 2014

FM-Index on GPU: A Cooperative Scheme to Reduce Memory Footprint.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014

Thread-cooperative, bit-parallel computation of levenshtein distance on GPU.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Supercomputing, 2014

Job scheduling in Hadoop with Shared Input Policy and RAMDISK.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Cluster Computing, 2014

2013

Job scheduling for optimizing data locality in Hadoop clusters.

[BibT_eX]

[DOI]

Proceedings of the 20th European MPI Users's Group Meeting, 2013

An Optimization for MapReduce Frameworks in Multi-core Architectures.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science, 2013

n-step FM-Index for Faster Pattern Matching.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science, 2013

msPar: A Parallel Coalescent Simulator.

[BibT_eX]

[DOI]

Carlos Montemuiño

Gonzalo Vera-Rodríguez

Sebastián Ramos-Onsins

Porfidio Hernández Budé

Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

2012

Analysis and improvement of map-reduce data distribution in read mapping applications.

[BibT_eX]

[DOI]

J. Supercomput., 2012

2011

Performance Behavior Prediction Scheme for Shared-Memory Parallel Applications.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Conference on Cluster Computing (CLUSTER), 2011

2010

Active learning processes to study memory hierarchy on Multicore systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science, 2010

Selecting a Suitable Multicore System for Shared-memory Parallel Applications.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2010

A reconfigurable cache memory with heterogeneous banks.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

2009

High-speed network modeling for full system simulation.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009

2007

Adaptive L2 Cache for Chip Multiprocessors.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2007 Workshops: Parallel Processing, 2007

2006

Aumentando las Prestaciones en la Predicción de Flujo de Instrucciones.

[BibT_eX]

[DOI]

PhD thesis, 2006

Wide and efficient trace prediction using the local trace predictor.

[BibT_eX]

[DOI]

Proceedings of the 20th Annual International Conference on Supercomputing, 2006

Evaluation of the field-programmable cache: performance and energy consumption.

[BibT_eX]

[DOI]

Proceedings of the Third Conference on Computing Frontiers, 2006

A Reconfigurable Data Cache for Adaptive Processors.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005

Performance and Power Evaluation of an Intelligently Adaptive Data Cache.

[BibT_eX]

[DOI]

Proceedings of the High Performance Computing, 2005

Target Encoding for Efficient Indirect Jump Prediction.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30, 2005

2004

Graduate students learning strategies through research collaboration.

[BibT_eX]

[DOI]

Paula Cecilia Fritzsche

Proceedings of the 9th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2004

2003

Optimizing a Decoupled Front-End Architecture: The Indexed Fetch Target Buffer (iFTB).

[BibT_eX]

[DOI]

Dolores Rexachs

Emilio Luque

Proceedings of the Euro-Par 2003. Parallel Processing, 2003

2002

The KScalar simulator.

[BibT_eX]

[DOI]

Dolores Rexachs

Emilio Luque

ACM J. Educ. Resour. Comput., 2002

Speeding Up Target Address Generation Using a Self-indexed FTB (Research Note).

[BibT_eX]

[DOI]