Biswabandan Panda

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

CLIP: Load Criticality based Data Prefetching for Bandwidth-constrained Many-core Systems.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

DDIOSim: A Microarchitecture Simulator for Data Direct I/O Technology.

[BibT_eX]

[DOI]

Hari Sharan

Mythili Vutukuru

Proceedings of the 30th IEEE International Conference on High Performance Computing, 2023

Drishyam: An Image is Worth a Data Prefetcher.

[BibT_eX]

[DOI]

Shubdeep Mohapatra

Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2022

AndroOBFS: Time-tagged Obfuscated Android Malware Dataset with Family Information.

[BibT_eX]

[DOI]

Dataset, April, 2022

DABANGG: A Case for Noise Resilient Flush-Based Cache Attacks.

[BibT_eX]

[DOI]

Anish Saxena

Proceedings of the 43rd IEEE Security and Privacy, 2022

Avenger: Punishing the Cross-Core Last-Level Cache Attacker and Not the Victim by Isolating the Attacker.

[BibT_eX]

[DOI]

Yashika Verma

Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022

AndroOBFS: Time-tagged Obfuscated Android Malware Dataset with Family Information.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE/ACM International Conference on Mining Software Repositories, 2022

SniP: An Efficient Stack Tracing Framework for Multi-threaded Programs.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE/ACM International Conference on Mining Software Repositories, 2022

Berti: an Accurate Local-Delta Data Prefetcher.

[BibT_eX]

[DOI]

Agustín Navarro-Torres

Jesús Alastruey-Benedé

Pablo Ibáñez

Víctor Viñals Yúfera

Alberto Ros

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Address Translation Conscious Caching and Prefetching for High Performance Cache Hierarchy.

[BibT_eX]

[DOI]

Vasudha

Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

EnclaveSim: A Micro-architectural Simulator with Enclave Support.

[BibT_eX]

[DOI]

Yashika Verma

Dixit Kumar

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

SpecPref: High Performing Speculative Attacks Resilient Hardware Prefetchers.

[BibT_eX]

[DOI]

Tarun Solanki

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

Micro BTB: a high performance and storage efficient last-level branch target buffer for servers.

[BibT_eX]

[DOI]

Mriganka Shekhar Chakravarty

Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022

2021

Introducing Fast and Secure Deterministic Stash Free Write Only Oblivious RAMs for Demand Paging in Keystone.

[BibT_eX]

[DOI]

CoRR, 2021

Micro BTB: A High Performance and Lightweight Last-Level Branch Target Buffer for Servers.

[BibT_eX]

[DOI]

CoRR, 2021

DAMARU: A Denial-of-Service Attack on Randomized Last-Level Caches.

[BibT_eX]

[DOI]

Pratik Kumar

Chavhan Sujeet Yashavant

IEEE Comput. Archit. Lett., 2021

Instruction Criticality Based Energy-Efficient Hardware Data Prefetching.

[BibT_eX]

[DOI]

Neelu Shivprakash Kalani

IEEE Comput. Archit. Lett., 2021

DeepDetect: A Practical On-device Android Malware Detector.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Conference on Software Quality, 2021

Empirical Analysis of Architectural Primitives for NVRAM Consistency.

[BibT_eX]

[DOI]

K. P. Arun

Debadatta Mishra

Proceedings of the 28th IEEE International Conference on High Performance Computing, 2021

Seclusive Cache Hierarchy for Mitigating Cross-Core Cache and Coherence Directory Attacks.

[BibT_eX]

[DOI]

Vinod Ganesan

Bhargav Achary Dandpati Kumar

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Inferring DNN layer-types through a Hardware Performance Counters based Side Channel Attack.

[BibT_eX]

[DOI]

Proceedings of the AIMLSystems 2021: The First International Conference on AI-ML-Systems, Bangalore India, October 21, 2021

2020

Bouquet of Instruction Pointers: Instruction Pointer Classifier-based Spatial Hardware Prefetching.

[BibT_eX]

[DOI]

Samuel Pakalapati

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Reverse Engineering the Stream Prefetcher for Profit.

[BibT_eX]

[DOI]

Aditya Rohan

Prakhar Agarwal

Proceedings of the IEEE European Symposium on Security and Privacy Workshops, 2020

STDNeut: Neutralizing Sensor, Telephony System and Device State Information on Emulated Android Environments.

[BibT_eX]

[DOI]

Proceedings of the Cryptology and Network Security - 19th International Conference, 2020

2019

Fooling the Sense of Cross-core Last-level Cache Eviction based Attacker by Prefetching Common Sense.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

How Sharp is SHARP ?

[BibT_eX]

[DOI]

Dixit Kumar

Chavhan Sujeet Yashavant

Proceedings of the 13th USENIX Workshop on Offensive Technologies, 2019

CoWLight: Hardware Assisted Copy-on-Write Fault Handling for Secure Deduplication.

[BibT_eX]

[DOI]

Proceedings of the 8th International Workshop on Hardware and Architectural Support for Security and Privacy, 2019

2018

Synergistic cache layout for reuse and compression.

[BibT_eX]

[DOI]

André Seznec

Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017

Band-Pass Prefetching: An Effective Prefetch Management Mechanism Using Prefetch-Fraction Metric in Multi-Core Systems.

[BibT_eX]

[DOI]

Aswinkumar Sridharan

André Seznec

ACM Trans. Archit. Code Optim., 2017

MBZip: Multiblock Data Compression.

[BibT_eX]

[DOI]

Kanakagiri Raghavendra

Madhu Mutyam

ACM Trans. Archit. Code Optim., 2017

RCTP: Region Correlated Temporal Prefetcher.

[BibT_eX]

[DOI]

Dennis Antony Varkey

Madhu Mutyam

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

2016

PBC: Prefetched Blocks Compaction.

[BibT_eX]

[DOI]

Kanakagiri Raghavendra

Madhu Mutyam

IEEE Trans. Computers, 2016

SPAC: A Synergistic Prefetcher Aggressiveness Controller for Multi-Core Systems.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Expert Prefetch Prediction: An Expert Predicting the Usefulness of Hardware Prefetchers.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2016

Dictionary sharing: An efficient cache compression scheme for compressed caches.

[BibT_eX]

[DOI]

André Seznec

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

2015

CAFFEINE: A Utility-Driven Prefetcher Aggressiveness Engine for Multicores.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2015

2014

Introducing Thread Criticality awareness in Prefetcher Aggressiveness Control.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

XStream: cross-core spatial streaming based MLC prefetchers for parallel applications in CMPs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013

TCPT - Thread criticality-driven prefetcher throttling.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012

CSHARP: Coherence and SHaring Aware Cache Replacement Policies for Parallel Applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

Hardware prefetchers for emerging parallel applications.

[BibT_eX]

[DOI]