Claudio Costi

According to our database, Claudio Costi authored at least 6 papers between 1993 and 2001.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2001

A methodology for analyzing hardware description language specifications of legacy designs.

Claudio Costi

PhD thesis, 2001

1998

Clock skew reduction in ASIC logic design: a methodology for clock tree management.

Alessandro Balboni, Claudio Costi, Massimo Pellencin, Andrea Quadrini, Donatella Sciuto

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1995

A new DFT methodology for sequential circuits.

Claudio Costi, Micaela Serra, Donatella Sciuto

J. Electron. Test., 1995

Automatic clock tree generation in ASIC designs.

Alessandro Balboni, Claudio Costi, A. Pellencin, M. Quadrini, Donatella Sciuto

Proceedings of the 1995 European Design and Test Conference, 1995

1994

From Behavioral Description to Systolic Array Based Architectures.

Alessandro Balboni, Claudio Costi, Franco Fummi, Donatella Sciuto

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1993

A design methodology for the correct specification of VLSI systems.

Cristiana Bolchini, Massimo Bombana, Patrizia Cavalloro, Claudio Costi, Franco Fummi, Giuseppe Zaza

Microprocess. Microprogramming, 1993