Claudio Parrella

According to our database, Claudio Parrella authored at least 6 papers between 2010 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Algorithm-Aware Digital Design for Analog-on-Top Chips: An ASK Demodulator Comparative Study.

Felice Tecce, Matteo Abate, Francesco Del Prete, Giovanni Amedeo Cirillo, Claudio Parrella, Marco Castellano

Proceedings of the 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, 2023

2020

Low-Power HWAccelerator for AI Edge-Computing in Human Activity Recognition Systems.

Antonio De Vita, Danilo Pau, Claudio Parrella, Luigi Di Benedetto, Alfredo Rubino, Gian Domenico Licciardo

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2017

Single Flip-Flop Driving Circuit for Glitch-Free NAND-Based Digitally Controlled Delay-Lines.

Davide De Caro, Fabio Tessitore, Gianfranco Vai, Gerardo Castellano, Ettore Napoli, Nicola Petra, Claudio Parrella, Antonio G. M. Strollo

Circuits Syst. Signal Process., 2017

2015

A 3.3 GHz Spread-Spectrum Clock Generator Supporting Discontinuous Frequency Modulations in 28 nm CMOS.

Davide De Caro, Fabio Tessitore, Gianfranco Vai, Nicola Imperato, Nicola Petra, Ettore Napoli, Claudio Parrella, Antonio G. M. Strollo

IEEE J. Solid State Circuits, 2015

2010

A 1.27 GHz, All-Digital Spread Spectrum Clock Generator/Synthesizer in 65 nm CMOS.

Davide De Caro, Carlo Alberto Romani, Nicola Petra, Antonio G. M. Strollo, Claudio Parrella

IEEE J. Solid State Circuits, 2010

An integrated thermal estimation framework for industrial embedded platforms.

Andrea Acquaviva, Andrea Calimera, Alberto Macii, Massimo Poncino, Enrico Macii, Matteo Giaconia, Claudio Parrella

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010