Dan Li

Orcid: 0000-0003-0721-3167

Affiliations:

Xi'an Jiaotong University, School of Microelectronics, China

According to our database¹, Dan Li authored at least 29 papers between 2016 and 2023.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2023

A CMOS slew-rate controlled output driver with low process, voltage and temperature variations using a dual-path signal-superposition technique.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., January, 2023

A Low-Power i-ToF LiDAR With Nonlinearity Self-Calibration Technique.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2023

A Reconfigurable Dual-Mode Integrated CMOS Laser Diode Driver for iToF/dToF Based 3D Sensing.

[BibT_eX]

[DOI]

Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Low-Power Inductor-Less Optical Receiver for 50G PON in 28nm CMOS.

[BibT_eX]

[DOI]

Ruixuan Yang

Shuaizhe Ma

Dan Li

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

2022

A 54-68 GHz Power Amplifier With Improved Linearity and Efficiency in 40 nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Overcoming the Transimpedance Limit: A Tutorial on Design of Low-Noise TIA.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Optical Receiver Front-End for 50G PON in 40nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

A 10/2.5-Gb/s Hyper-Supplied CMOS Low-Noise Burst-Mode TIA with Loud Burst Protection and Gearbox Automatic Offset Cancellation for XGS-PON.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021

A Low-Noise Stacked Differential Optical Receiver in 0.18-μm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A 320×240 I-ToF CMOS Image Sensor with 2-Tap 5.6µm Pixel and Mismatch-Nonlinearity Suppression.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 100GBaud Optical Receiver Front-End in 90nm SiGe BiCMOS.

[BibT_eX]

[DOI]

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 130-GBaud 2: 1 Analog Multiplexer in 130-nm SiGe BiCMOS.

[BibT_eX]

[DOI]

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 720-mVpp 224-Gb/s PAM4 Optical Receiver with Multiple Peaking Techniques in 130-nm SiGe BiCMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2020

Low-Supply Sensitivity LC VCOs With Complementary Varactors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2020

A 112-Gb/s PAM-4 Linear Optical Receiver in 130-nm SiGe BiCMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Full-duplex Transceiver with Integrated Active Quasi-circulator Achieving Self-interference RF Cancellation over Wide Bandwidth.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 100-Gb/s PAM-4 CTLE in 28-nm CMOS with Coarse-Fine Gain Adjustment.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 16Gb/s Triple-Mode Driver in 0.18μm CMOS Technology.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019

Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 13.56 MHz, 94.1% Peak Efficiency CMOS Active Rectifier With Adaptive Delay Time Control for Wireless Power Transmission Systems.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2019

A Stacked 4×25 Gb/s Optical Receiver in 28 nm CMOS with 0.154 mW/Gb/s Power Efficiency.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Active Rectifiers in Wireless Power Transmission Systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on IC Design and Technology, 2019

2018

A 50Gb/s-PAM4 CDR with On-Chip Eye Opening Monitor for Reference-Level and Clock-Sampling Adaptation.

[BibT_eX]

[DOI]

Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

Low-Noise High-Linearity 56Gb/s PAM-4 Optical Receiver in 45nm SOI CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Single-stage dual-output AC-DC converter for wireless power transmission.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017

Theoretical Model of E<sup>n</sup>DP to Achieve Energy-Efficient SRAM.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A delay time controlled active rectifier with 95.3% peak efficiency for wireless power transmission systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016

A 25Gb/s low-noise optical receiver in 0.13 μm SiGe BiCMOS.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Dan Li

Timeline

Legend:

Links

Online presence:

On csauthors.net:

Bibliography

Loading...