Daniela Genius

Proceedings of the 12th International Conference on Model-Based Software and Systems Engineering, 2024

2023

Hierarchical Design of Cyber-Physical Systems.

[BibT_eX]

[DOI]

Proceedings of the 11th International Conference on Model-Based Software and Systems Engineering, 2023

2022

Model to Hardware: System-level Modeling for Wearable Devices.

[BibT_eX]

[DOI]

Roselyne Chotin

Proceedings of the 10th International Conference on Model-Driven Engineering and Software Development, 2022

2021

Handling causality and schedulability when designing and prototyping cyber-physical systems.

[BibT_eX]

[DOI]

Rodrigo Cortés Porto

Softw. Syst. Model., 2021

Interfacing Digital and Analog Models for Fast Simulation and Virtual Prototyping.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Model-Driven Engineering and Software Development, 2021

2020

Model-Based Virtual Prototyping of CPS: Application to Bio-Medical Devices.

[BibT_eX]

[DOI]

Proceedings of the Model-Driven Engineering and Software Development, 2020

High-level Partitioning and Design Space Exploration for Cyber Physical Systems.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Model-Driven Engineering and Software Development, 2020

Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions.

[BibT_eX]

[DOI]

François Pêcheux

Liliana Andrade

Marie-Minerve Louërat

Ilias Bournias

Roselyne Chotin

Proceedings of the Forum for Specification and Design Languages, 2020

2019

High-level modeling of communication-centric applications: Extensions to a system-level design and virtual prototyping tool.

[BibT_eX]

[DOI]

Letitia W. Li

Microprocess. Microsystems, 2019

Scalability of TTool's AMS extensions: a case study.

[BibT_eX]

[DOI]

CoRR, 2019

Modeling and Virtual Prototyping for Embedded Systems on Mixed-Signal Multicores.

[BibT_eX]

[DOI]

Rodrigo Cortés Porto

Proceedings of the Rapid Simulation and Performance Evaluation: Methods and Tools, 2019

A Framework for Multi-level Modeling of Analog/Mixed Signal Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Model-Driven Engineering and Software Development, 2019

A Tool for High-level Modeling of Analog/Mixed Signal Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 7th International Conference on Model-Driven Engineering and Software Development, 2019

2018

System-Level Design and Virtual Prototyping of a Telecommunication Application on a NUMA Platform.

[BibT_eX]

[DOI]

Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

Multi-level Latency Evaluation with an MDE Approach.

[BibT_eX]

[DOI]

Proceedings of the 6th International Conference on Model-Driven Engineering and Software Development, 2018

2017

System-level design for communication-centric task farm applications.

[BibT_eX]

[DOI]

Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

Formal and Virtual Multi-level Design Space Exploration.

[BibT_eX]

[DOI]

Letitia W. Li

Proceedings of the Model-Driven Engineering and Software Development, 2017

Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design.

[BibT_eX]

[DOI]

Letitia W. Li

Proceedings of the 5th International Conference on Model-Driven Engineering and Software Development, 2017

2014

Reconciling performance and predictability on a many-core through off-line mapping.

[BibT_eX]

[DOI]

Dumitru Potop-Butucaru

Robert de Simone

Franck Wajsbürt

Zhen Zhang

Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

2013

Space optimal solution for data reordering in streaming applications on NoC based MPSoC.

[BibT_eX]

[DOI]

Alix Munier Kordon

J. Syst. Archit., 2013

Measuring memory access latency for software objects in a NUMA system-on-chip architecture.

[BibT_eX]

[DOI]

Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

2012

A solution to the data re-ordering problem for multi-pipeline streaming applications on clustered MPSoC.

[BibT_eX]

[DOI]

Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

A hierarchical approach to the out-of-order arrival of frames in video streaming applications on clustered MPSoC.

[BibT_eX]

[DOI]

Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011

Monitoring communication channels on a shared memory multi-processor system on chip.

[BibT_eX]

[DOI]

Nicolas Pouillon

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Analyzing software inter-task communication channels on a clustered shared memory multi processor system-on-chip.

[BibT_eX]

[DOI]

Nicolas Pouillon

Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2009

A generic hardware / software communication middleware for streaming applications on shared memory multi processor systems-on-chip.

[BibT_eX]

[DOI]

Proceedings of the Forum on specification and Design Languages, 2009

A Buffer Space Optimal Solution for Re-establishing the Packet Order in a MPSoC Network Processor.

[BibT_eX]

[DOI]

Alix Munier Kordon

Proceedings of the Euro-Par 2009 Parallel Processing, 2009

2008

Telecommunication Application Modelling with Multi Writer Multi Reader Channels: a Case Study.

[BibT_eX]

[DOI]

Etienne Faure

Proceedings of the Forum on specification and Design Languages, 2008

2006

A generic hardware/software communication mechanism for Multi-Processor System on Chip, Targeting Telecommunication Applications.

[BibT_eX]

Etienne Faure

Alain Greiner

Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

2004

Modular On-chip Multiprocessor for Routing Applications.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2004 Parallel Processing, 2004

2002

Multi-periodic Process Networks: Prototyping and Verifying Stream-Processing Systems.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2002, 2002

2001

Konfliktvermeidende Speicherabbildung durch zyklische Graphfärbung.

[BibT_eX]

[DOI]

PhD thesis, 2001

The Combinatorics of Cache Misses during Matrix Multiplication.

[BibT_eX]

[DOI]

Philip J. Hanlon

Dean Chung

Siddhartha Chatterjee

Alvin R. Lebeck

Erin Parker

J. Comput. Syst. Sci., 2001

1999

Compiler-Directed Reordering of Data by Cyclic Graph Coloring.

[BibT_eX]

[DOI]

Sylvain Lelait

Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

Reducing Cache Conflicts by a Parametrized Memory Mapping.

[BibT_eX]

[DOI]

Jörn Eisenbiegler

Proceedings of the Parallel Computation, 1999

1998

An Approach to Improve Locality Using Sandwich Types.

[BibT_eX]

[DOI]

Martin Trapp

Wolf Zimmermann

Proceedings of the Types in Compilation, Second International Workshop, 1998

Handling Cross Interferences by Cyclic Cache Line Coloring.

[BibT_eX]

[DOI]