Marc Duranton

According to our database1, Marc Duranton authored at least 26 papers between 1992 and 2019.

Collaborative distances:



In proceedings 
PhD thesis 




A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing.
J. Solid-State Circuits, 2019

HiPEAC: a European network built to last.
Commun. ACM, 2019

A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Real-time multiple objects tracking on Raspberry-Pi-based smart embedded camera.
J. Electronic Imaging, 2016

Low Complexity Multi-object Tracking System Dealing with Occlusions.
Proceedings of the VISAPP 2015, 2015

Reliable multi-object tracking dealing with occlusions for a smart camera.
Proceedings of the 9th International Conference on Distributed Smart Camera, 2015

Efficient Data Encoding for Convolutional Neural Network application.
TACO, 2014

Low complexity multi-target tracking for embedded systems.
Proceedings of the 17th International Conference on Information Fusion, 2014

The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators.
Proceedings of the 2014 International Conference on Compilers, 2014

Advanced technologies for brain-inspired computing.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

Balancing Programmability and Silicon Efficiency of Heterogeneous Multicore Architectures.
ACM Trans. Embedded Comput. Syst., 2012

BenchNN: On the broad potential application scope of hardware neural network accelerators.
Proceedings of the 2012 IEEE International Symposium on Workload Characterization, 2012

Capacitance of TSVs in 3-D stacked chips a problem?: not for neuromorphic systems!
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

ACOTES Project: Advanced Compiler Technologies for Embedded Streaming.
International Journal of Parallel Programming, 2011

ERBIUM: a deterministic, concurrent intermediate representation for portable and scalable performance.
Proceedings of the 7th Conference on Computing Frontiers, 2010

Erbium: a deterministic, concurrent intermediate representation to map data-flow tasks to scalable, persistent streaming processes.
Proceedings of the 2010 International Conference on Compilers, 2010

A Time-Consistent Video Segmentation Algorithm Designed for Real-Time Implementation.
VLSI Design, 2008

A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Programmable Engines for Embedded Systems: The New Challenges.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

N-synchronous Kahn networks: a relaxed model of synchrony for real-time systems.
Proceedings of the 33rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2006

The Challenges for High Performance Embedded Systems.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Synchronization of periodic clocks.
Proceedings of the EMSOFT 2005, 2005

Understanding Video Pixel Processing Applications for Flexible Implementations.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

Multi-periodic Process Networks: Prototyping and Verifying Stream-Processing Systems.
Proceedings of the Euro-Par 2002, 2002

Image processing by neural networks.
IEEE Micro, 1996

Lneuro 1.0: a piece of hardware LEGO for building neural network systems.
IEEE Trans. Neural Networks, 1992