Danilo Ravotto

According to our database1, Danilo Ravotto authored at least 17 papers between 2007 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Functional Verification of DMA Controllers.
J. Electron. Test., 2011

2010
Analysis and development of methodologies for advanced microprocessor design support.
PhD thesis, 2010

Generating power-hungry test programs for power-aware validation of pipelined processors.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

Functional test generation for DMA controllers.
Proceedings of the 11th Latin American Test Workshop, 2010

A software-based self-test methodology for system peripherals.
Proceedings of the 15th European Test Symposium, 2010

A hardware accelerated framework for the generation of design validation programs for SMT processors.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009
Test Program Generation for Communication Peripherals in Processor-Based SoC Devices.
IEEE Des. Test Comput., 2009

Design validation of multithreaded architectures using concurrent threads evolution.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Automatic detection of software defects: an industrial experience.
Proceedings of the Genetic and Evolutionary Computation Conference, 2009

On the Generation of Functional Test Programs for the Cache Replacement Logic.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008
A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs.
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

An Evolutionary Methodology for Test Generation for Peripheral Cores Via Dynamic FSM Extraction.
Proceedings of the Applications of Evolutionary Computing, 2008

Software-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007
On Automatic Test Block Generation for Peripheral Testing in SoCs via Dynamic FSMs Extraction.
Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

Automotive Microcontroller End-of-Line Test via Software-Based Methodologies.
Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

A local analysis of an incremental evolutionary tool for processor diagnosis.
Proceedings of the IEEE Congress on Evolutionary Computation, 2007


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