Devang Jariwala

According to our database, Devang Jariwala authored at least 5 papers between 2004 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2013

How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core.

Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2007

RBI: Simultaneous Placement and Routing Optimization Technique.

Devang Jariwala, John Lillis

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2006

Trunk decomposition based global routing optimization.

Devang Jariwala, John Lillis

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2005

A study of tighter lower bounds in LP relaxation based placement.

Qingzhou (Ben) Wang, Devang Jariwala, John Lillis

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004

On interactions between routing and detailed placement.

Devang Jariwala, John Lillis

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004