Patrick Morrow

According to our database, Patrick Morrow authored at least 4 papers between 2006 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Novel Cell Architectures with Back-side Transistor Contacts for Scaling and Performance.

Mauro J. Kobrinsky, J. D. Silva, E. Mannebach, S. Mills, M. Abd El Qader, O. Adebayo, N. Arkali Radhakrishna, M. Beasley, J. Chawla, S. Chugh, A. Dasgupta, U. Desai, E. De Re, G. Dewey, T. Edwards, C. Engel, V. Gudmundsson, Jeffery Hicks, B. Krist, R. Mehandru, Inanc Meric, Patrick Morrow, D. Nandi, P. Patel, R. Ramamurthy, D. Samanta, L. Shoer, A. St Amour, L. H. Tan, Sukru Yemenicioglu, X. Wang, T. Ghani

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2013

How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core.

Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Ultra high density logic designs using transistor-level monolithic 3D integration.

Young-Joon Lee, Patrick Morrow, Sung Kyu Lim

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2006

Die Stacking (3D) Microarchitecture.

Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Patrick Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006