V. Ramgopal Rao

Orcid: 0000-0001-9157-957X

According to our database1, V. Ramgopal Rao authored at least 36 papers between 2001 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Gate voltage tunable temperature coefficient of resistance of WSe2 for thermal sensing applications.
Dataset, December, 2022

2020
Switched-Capacitor-Assisted Power Gating for Ultra-Low Standby Power in CMOS Digital ICs.
IEEE Trans. Circuits Syst., 2020

2018
Microcantilever Based Dual Mode Optical Biosensor for Agricultural Pathogen Detection.
Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018

Induced Stress Enhancement Using U-shaped Arms in a 3-Axis Piezoresistive MEMS Accelerometer.
Proceedings of the 15th International Multi-Conference on Systems, Signals & Devices, 2018

2017
A Novel Method of Discrete-Time Amplification using NEMS Devices.
CoRR, 2017

Vapor phase self-assembly of metal-porphyrins for controllable work function tuning.
Proceedings of the 12th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2017

2016
Low power, area efficient, and temperature-variation tolerant bidirectional current source for sensor applications.
Microelectron. J., 2016

A Fully-Integrated Radio-Frequency Power Amplifier in 28nm CMOS Technology Mounted in BGA Package.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

Experimental and theoretical analyses of effect of ZnO nanowire growth on mechanical properties of microcantilevers for dynamic sensing applications.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

Organic field effect transistors for explosive and radiation dosimetry applications.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

Thikness dependence investigation of the mutual inductance link in concentric planar transformers.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015
Behavior analysis of a 3-axis detection push-pull piezoresistive MEMS accelerometer.
Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

2012
Current Excitation Method for DeltaR Measurement in Piezo-Resistive Sensors With a 0.3-ppm Resolution.
IEEE Trans. Instrum. Meas., 2012

A Low-Power Instrumentation System for Nano-Electro-Mechanical-Sensors for Environmental and Healthcare Applications.
J. Low Power Electron., 2012

Circuit Optimization at 22nm Technology Node.
Proceedings of the 25th International Conference on VLSI Design, 2012

2011
A novel architecture for improving slew rate in FinFET-based op-amps and OTAs.
Microelectron. J., 2011

A low-cost, ultra sensitive hand-held system for explosive detection using piezo-resistive micro-cantilevers.
Proceedings of the International SoC Design Conference, 2011

Highly Sensitive ?R/R Measurement System for Nano-electro-Mechanical Cantilever Based Bio-sensors.
Proceedings of the International Symposium on Electronic System Design, 2011

Piezoresistive 6-MNA coated microcantilevers with signal conditioning circuits for electronic nose.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
Analysis of dependence of short-channel effects in double-gate MOSFETs on channel thickness.
Microelectron. Reliab., 2010

Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

A 8-resistor SU-8 accelerometer with reduced cross axis sensitivity.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
A Novel Table-Based Approach for Design of FinFET Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Automated design and optimization of circuits in emerging technologies.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2007
Parasitic Effects in Multi-Gate MOSFETs.
IEICE Trans. Electron., 2007

2006
Embedded Tutorial: Analog Circuit Performance Issues with Aggressively Scaled Gate Oxide CMOS Technologies.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005
Physics and Technology: Towards Low-Power DSM Design.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004
The Influence of Process Variations on the Halo MOSFETs and its Implications on the Analog Circuit performance.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

2003
Detailed Analysis of FIBL in MOS Transistors with High-K Gate Dielectrics.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Small Signal Characteristics of Thin Film Single Halo SOI MOSFET for Mixed Mode Applications.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

A Novel Dynamic Threshold Operation Using Electrically Induced Junction MOSFET in the Deep Sub-micrometer CMOS Regime.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

2001
Sub-100 nm CMOS circuit performance with high-K gate dielectrics.
Microelectron. Reliab., 2001

Multi-frequency transconductance technique for interface characterization of deep sub-micron SOI-MOSFETs.
Microelectron. Reliab., 2001

erformance Optimization Of 60 Nm Channel Length Vertical Mosfets Using Channel Engineering.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Effect Of Fringing Capacitances In Sub 100 Nm Mosfet's With High-K Gate Dielectrics.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001


  Loading...