Doug A. Edwards

According to our database, Doug A. Edwards authored at least 25 papers between 2000 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

De-elastisation: from asynchronous dataflows to synchronous circuits.

Mahdi Jelodari Mamaghani, Jim D. Garside, Doug A. Edwards

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Automatic data path extraction in large-scale register-transfer level designs.

Wei Song, Jim D. Garside, Doug A. Edwards

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Optimised Synthesis of Asynchronous Elastic Dataflows by Leveraging Clocked EDA.

Mahdi Jelodari Mamaghani, Jim D. Garside, William B. Toms, Doug A. Edwards

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013

Computational Performance Optimisation for Statistical Analysis of the Effect of Nano-CMOS Variability on Integrated Circuits.

Zheng Xie, Doug A. Edwards

VLSI Design, 2013

2012

Area efficient asynchronous SDM routers using 2-stage Clos switches.

Wei Song, Doug A. Edwards, Jim D. Garside, William J. Bainbridge

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

Asynchronous spatial division multiplexing router.

Wei Song, Doug A. Edwards

Microprocess. Microsystems, 2011

2010

Asynchronous Data-Driven Circuit Synthesis.

Sam Taylor, Doug A. Edwards, Luis A. Plana, Luis A. Tarazona

IEEE Trans. Very Large Scale Integr. Syst., 2010

Description-Level Optimisation of Synthesisable Asynchronous Circuits.

Luis A. Tarazona, Doug A. Edwards, Andrew Bardsley, Luis A. Plana

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Computation reduction for statistical analysis of the effect of nano-CMOS variability on asynchronous circuits.

Zheng Xie, Doug A. Edwards

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

A low latency wormhole router for asynchronous on-chip networks.

Wei Song, Doug A. Edwards

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

An Asynchronous Routing Algorithm for Clos Networks.

Wei Song, Doug A. Edwards

Proceedings of the 10th International Conference on Application of Concurrency to System Design, 2010

2009

Adaptive stochastic routing in fault-tolerant on-chip networks.

Wei Song, Doug A. Edwards, José Luis Núñez-Yáñez, Sohini Dasgupta

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Dual-Sum Single-Carry Self-Timed Adder Designs.

P. Balasubramanian, Doug A. Edwards

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

Building asynchronous routers with independent sub-channels.

Wei Song, Doug A. Edwards

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor.

Luis A. Tarazona, Doug A. Edwards, Luis A. Plana

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks.

William B. Toms, Doug A. Edwards

Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009

Teak: A Token-Flow Implementation for the Balsa Language.

Andrew Bardsley, Luis A. Tarazona, Doug A. Edwards

Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009

2008

Adaptive routing strategies for fault-tolerant on-chip networks in dynamically reconfigurable systems.

José L. Núñez-Yáñez, Doug A. Edwards, Antonio Marcello Coppola

IET Comput. Digit. Tech., 2008

Automatic Compilation of Data-Driven Circuits.

Sam Taylor, Doug A. Edwards, Luis A. Plana

Proceedings of the 14th IEEE International Symposium on Asynchronous Circuits and Systems, 2008

2007

Performance-driven syntax-directed synthesis of asynchronous processors.

Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A. Tarazona, Andrew Bardsley

Proceedings of the 2007 International Conference on Compilers, 2007

2005

Synthesis of Asynchronous Circuits Using Early Data Validity.

Nitin Gupta, Doug A. Edwards

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Attacking Control Overhead to Improve Synthesised Asynchronous Circuit Performance.

Luis A. Plana, Sam Taylor, Doug A. Edwards

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

2002

Balsa: An Asynchronous Hardware Synthesis Language.

Doug A. Edwards, Andrew Bardsley

Comput. J., 2002

A Burst-Mode Oriented Back-End for the Balsa Synthesis System.

Tiberiu Chelcea, Steven M. Nowick, Andrew Bardsley, Doug A. Edwards

Proceedings of the 2002 Design, 2002

2000

Synthesising an asynchronous DMA controller with Balsa.

Andrew Bardsley, Doug A. Edwards

J. Syst. Archit., 2000