Eduardo Braulio Wanderley Netto

According to our database1, Eduardo Braulio Wanderley Netto authored at least 11 papers between 2003 and 2009.

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Bibliography

2009
A security approach for off-chip memory in embedded microprocessor systems.
Microprocess. Microsystems, 2009

2007
A Code Compression Method to Cope with Security Hardware Overheads.
Proceedings of the 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 2007

Low latency Solution for Confidentiality and Integrity Checking in Embedded Systems with Off-Chip Memory.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

A Code Compression Method with Confidentiality and Integrity Checking.
Proceedings of the 2007 International Conference on Embedded Systems & Applications, 2007

2005
Design of a decompressor engine on a SPARC processor.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

Exploiting the Area X Performance Trade-off with Code Compression.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005

2004
Compressão de codigo baseada em multi-profile.
PhD thesis, 2004

Multi-Profile Instruction Based Compression.
Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 2004

Multi-profile based code compression.
Proceedings of the 41th Design Automation Conference, 2004

2003
Mixed static/dynamic profiling for dictionary based code compression.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003


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