Endri Kaja

According to our database1, Endri Kaja authored at least 10 papers between 2021 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

Parallel Golomb-Rice Decoder with 8-bit Unary Decoding for Weight Compression in TinyML Applications.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Bits, Flips and RISCs.
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2022
MetFI: Model-driven Fault Simulation Framework.
CoRR, 2022

Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

MetaFS: Model-driven Fault Simulation Framework.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2021
Extending Verilator to Enable Fault Simulation.
Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2021

Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

ISA Modeling with Trace Notation for Context Free Property Generation.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021


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