Anselm Breitenreiter

Orcid: 0000-0001-7095-7551

According to our database1, Anselm Breitenreiter authored at least 22 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Bits, Flips and RISCs.
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

SET and SEU Hardened Clock Gating Cell.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022
Fast Error Propagation Probability Estimates by Answer Set Programming and Approximate Model Counting.
IEEE Access, 2022

Laser Fault Injection Attacks against Radiation Tolerant TMR Registers.
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

2021
Design and Evaluation of Radiation-Hardened Standard Cell Flip-Flops.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Machine Learning Approach for Accelerating Simulation-based Fault Injection.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Reliability Analysis in Less than 200 Lines of Code.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Power- and Area-optimized Neural Network IC-Design for Academic Education.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

A Tunable Single Event Transient Filter Based on Digitally Controlled Capacitive Delay Cells.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2020
Double cell upsets mitigation through triple modular redundancy.
Microelectron. J., 2020

R-Abax: A Radiation Hardening Legalisation Algorithm Satisfying TMR Spacing Constraints.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Characterization of Single Event Transient Effects in Standard Delay Cells.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Design Concept for Radiation-Hardening of Triple Modular Redundancy TSPC Flip-Flops.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

A Glitch-free Clock Multiplexer for Non-Continuously Running Clocks.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
Selective Fault Tolerance by Counting Gates with Controlling Value.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

A Radiation Tolerant 10/100 Ethernet Transceiver for Space Applications.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Aspects on Timing Modeling of Radiation-Hardness by Design Standard Cell-Based △TMR Flip-Flops.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
D-SET Mitigation Using Common Clock Tree Insertion Techniques for Triple-Clock TMR Flip-Flop.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

A Methodology to Verify Digital IP's within Mixed-Signal Systems.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Flip-Flop SEUs Mitigation through Partial Hardening of Internal Latch and Adjustment of Clock Duty Cycle.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017
Design of an On-chip System for the SET Pulse Width Measurement.
Proceedings of the Euromicro Conference on Digital System Design, 2017


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