Gabriella Trucco

Orcid: 0000-0002-5904-0969

According to our database1, Gabriella Trucco authored at least 38 papers between 2004 and 2024.

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Bibliography

2024
Efficient Secure Computation of Edit Distance on Genomic Data.
Proceedings of the 10th International Conference on Information Systems Security and Privacy, 2024

2023
Towards the Construction of an RNA-centered Knowledge Graph.
Proceedings of the 31st Symposium of Advanced Database Systems, 2023

A Meta-Graph for the Construction of an RNA-Centered Knowledge Graph.
Proceedings of the Bioinformatics and Biomedical Engineering, 2023

2021
Non-coding DNA: A Methodology for Detection and Analysis of Pseudogenes.
Proceedings of the 14th International Joint Conference on Biomedical Engineering Systems and Technologies, 2021

2020
Stuck-At Fault Mitigation of Emerging Technologies Based Switching Lattices.
J. Electron. Test., 2020

Explainable Machine Learning for Early Assessment of COVID-19 Risk Prediction in Emergency Departments.
IEEE Access, 2020

2019
Boolean Minimization of Projected Sums of Products via Boolean Relations.
IEEE Trans. Computers, 2019

Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model.
Proceedings of the IEEE Latin American Test Symposium, 2019

2018
Composition of switching lattices for regular and for decomposed functions.
Microprocess. Microsystems, 2018

Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods.
Microprocess. Microsystems, 2018

2017
A colored graph approach to perfect phylogeny with persistent characters.
Theor. Comput. Sci., 2017

Species-Driven Persistent Phylogeny.
Fundam. Informaticae, 2017

Composition of Switching Lattices and Autosymmetric Boolean Function Synthesis.
Proceedings of the Euromicro Conference on Digital System Design, 2017

2016
Solving the Persistent Phylogeny Problem in polynomial time.
CoRR, 2016

Synthesis on switching lattices of Dimension-reducible Boolean functions.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Logic Synthesis for Switching Lattices by Decomposition with P-Circuits.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
Using Flexibility in P-Circuits by Boolean Relations.
IEEE Trans. Computers, 2015

Biconditional-BDD Ordering for Autosymmetric Functions.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Bi-Decomposition Using Boolean Relations.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
Algorithms for the Constrained Perfect Phylogeny with Persistent Characters.
CoRR, 2014

Radiation-tolerant standard cell synthesis using double-rail redundant approach.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
SOP restructuring by exploiting don't cares.
Microprocess. Microsystems, 2013

Minimization of EP-SOPs via Boolean relations.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Minimization of P-circuits using Boolean relations.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
The binary perfect phylogeny with persistent characters.
Theor. Comput. Sci., 2012

Synthesis of P-circuits for logic restructuring.
Integr., 2012

Projected Don't Cares.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011
An approximation algorithm for cofactoring-based synthesis.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010
Properties of Digital Switching Currents in Fully CMOS Combinational Logic.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Analysis and Measurement of Crosstalk Effects on Mixed-Signal CMOS ICs With Different Mounting Technologies.
IEEE Trans. Instrum. Meas., 2010

2009
Logic Minimization and Testability of 2SPP-P-Circuits.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

On decomposing Boolean functions via extended cofactoring.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
A Comparison between Two Logic Synthesis Forms from Digital Switching Noise Viewpoint.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

2007
Effects of digital switching noise on analog circuits performance.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
Methods for analysis and simulation of crosstalk in mixed-signal CMOS ICs.
PhD thesis, 2006

Effects of digital switching noise on analog voltage references in mixed-signal CMOS ICs.
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

2004
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

A Study of Crosstalk Through Bonding and Package Parasitics in CMOS Mixed Analog-Digital Circuits.
Proceedings of the Integrated Circuit and System Design, 2004


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