Seyedruhollah Shojaii

Orcid: 0000-0002-9449-0412

According to our database1, Seyedruhollah Shojaii authored at least 8 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Heterogeneous computing system platform for high-performance pattern recognition applications.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

A low-power and high-density Associative Memory in 28 nm CMOS technology.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

2015

Double-redundant design methodology to improve radiation hardness in pixel detector readout ICs.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015


2014
Radiation-tolerant standard cell synthesis using double-rail redundant approach.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Characterisation of an Associative Memory Chip for high-energy physics experiments.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014

2012
A new XOR-based Content Addressable Memory architecture.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012


  Loading...