Guanzhong Huang

According to our database1, Guanzhong Huang authored at least 9 papers between 2010 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
Analog Assisted Multichannel Digital Postcorrection for Time-Interleaved ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015
Simplified Volterra series based background calibration for high speed high resolution pipelined ADCs.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2013
A TIME-DOMAIN 1.0-V/0.8-MW 6-BIT 125 MS/S FLASH ADC IN 65 NM CMOS.
J. Circuits Syst. Comput., 2013

1.1-V, 8-bit, 12 MS/s asynchronous reference-free successive-approximation-register analogue-todigital converter in 0.18 μm CMOS with separated capacitor arrays.
IET Circuits Devices Syst., 2013

2012
A 15fJ/conversion-step 8-bit 50 MS/s asynchronous SAR ADC with efficient charge recycling technique.
Microelectron. J., 2012

A 5-bit 125-MS/s 367-µW ADC in 65-nm CMOS.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011
A 48-mW, 12-bit, 150-MS/s pipelined ADC with digital calibration in 65nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
A fast bootstrapped switch for high-speed high-resolution A/D converter.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010


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