H. Puliyalil
According to our database1,
H. Puliyalil
authored at least 5 papers
between 2022 and 2025.
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Bibliography
2025
Proceedings of the IEEE International Memory Workshop, 2025
Accurate off-current evaluation by parasitic capacitance extraction in capacitor-less DRAM cells.
Proceedings of the IEEE International Memory Workshop, 2025
2023
Lowest IOFF < 3×10<sup>-21</sup> A/μm in capacitorless DRAM achieved by Reactive Ion Etch of IGZO-TFT.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Device engineering guidelines for performance boost in IGZO front gated TFTs based on defect control.
Proceedings of the International Conference on IC Design and Technology, 2022