Kevin Vandersmissen

According to our database, Kevin Vandersmissen authored at least 8 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Integration of a Stacked Contact MOL for Monolithic CFET.

Victor Vega-Gonzalez, D. Radisic, Bt Chan, S. Choudhury, S. Wang, A. Mingardi, Q. Toan Le, H. Decoster, Y. Oniki, P. Puttarame, Kevin Vandersmissen, J. P. Soulie, A. Peter, A. Sepulveda, D. Batuk, G. T. Martinez, Olivier Richard, Jürgen Bömmels, S. Biesemans, E. Dentoni Litta, Naoto Horiguchi, S. Park, Zsolt Tokei

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.

Hans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Y. Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails.

Anabela Veloso, Anne Jourdain, D. Radisic, Rongmei Chen, G. Arutchelvan, B. O'Sullivan, Hiroaki Arimura, Michele Stucchi, An De Keersgieter, M. Hosseini, T. Hopf, K. D'Have, S. Wang, E. Dupuy, G. Mannaert, Kevin Vandersmissen, S. Iacovo, P. Marien, S. Choudhury, F. Schleicher, F. Sebaai, Y. Oniki, X. Zhou, A. Gupta, Tom Schram, B. Briggs, C. Lorant, E. Rosseel, Andriy Hikavyy, Roger Loo, J. Geypen, D. Batuk, G. T. Martinez, J. P. Soulie, Katia Devriendt, B. T. Chan, S. Demuynck, Gaspard Hiblot, Geert Van der Plas, Julien Ryckaert, Gerald Beyer, E. Dentoni Litta, Eric Beyne, Naoto Horiguchi

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections.

A. Vandooren, N. Parihar, Jacopo Franco, Roger Loo, Hiroaki Arimura, R. Rodriguez, F. Sebaai, S. Iacovo, Kevin Vandersmissen, W. Li, G. Mannaert, D. Radisic, E. Rosseel, Andriy Hikavyy, Anne Jourdain, O. Mourey, G. Gaudin, S. Reboh, L. Le Van-Jodin, Guillaume Besnard, C. Roda Neve, Bich-Yen Nguyen, Iuliana P. Radu, E. Dentoni Litta, N. Horiguchi

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm.

S. Subhechha, Nouredine Rassoul, Attilio Belmonte, Hubert Hody, Harold Dekkers, Michiel J. van Setten, Adrian Vaisman Chasin, Shamin H. Sharifi, S. Sutar, L. Magnarin, Umberto Celano, H. Puliyalil, S. Kundu, M. Pak, Lieve Teugels, D. Tsvetanova, Nina Bazzazian, Kevin Vandersmissen, C. Biasotto, D. Batuk, J. Geypen, J. Heijlen, Romain Delhougne, Gouri Sankar Kar

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Device engineering guidelines for performance boost in IGZO front gated TFTs based on defect control.

S. Subhechha, Nouredine Rassoul, Attilio Belmonte, Hubert Hody, Harold Dekkers, Michiel J. van Setten, Adrian Vaisman Chasin, Shamin H. Sharifi, K. Banerjee, H. Puliyalil, S. Kundu, M. Pak, D. Tsvetanova, Nina Bazzazian, Kevin Vandersmissen, D. Batuk, J. Geypen, J. Heijlen, Romain Delhougne, Gouri Sankar Kar

Proceedings of the International Conference on IC Design and Technology, 2022

2021

Graphene electro-absorption modulators integrated at wafer-scale in a CMOS fab.

Cheng Han Wu, Steven Brems, Didit Yudistira, Daire Cott, A. Milenin, Kevin Vandersmissen, A. Maestre, A. Centeno, Joris Van Campenhout, Cedric Huyghebaert, Marianna Pantouvaki

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2014

Cu seeding using electroless deposition on Ru liner for high aspect ratio through-Si vias.

Fumihiro Inoue, Harold Philipsen, Marleen H. van der Veen, Kevin Vandersmissen, Stefaan Van Huylenbroeck, Herbert Struyf, Tetsu Tanaka

Proceedings of the 2014 International 3D Systems Integration Conference, 2014