Maarten Rosmeulen

According to our database, Maarten Rosmeulen authored at least 12 papers between 2002 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Enabling 3D NAND Trench Cells for Scaled Flash Memories.

S. Rachidi, S. Ramesh, L. Breuil, Z. Tao, Devin Verreck, G. L. Donadio, Antonio Arreghini, G. Van den Bosch, Maarten Rosmeulen

Proceedings of the IEEE International Memory Workshop, 2023

Improved MW of IGZO-channel FeFET by Reading Scheme Optimization and Interfacial Engineering.

Zhuo Chen, Nicolo Ronchi, Amey Walke, Kaustuv Banerjee, Mihaela Ioana Popovici, Kostantine Katcko, Geert Van den Bosch, Maarten Rosmeulen, Valeri Afanas'ev, Jan Van Houdt

Proceedings of the IEEE International Memory Workshop, 2023

Optimization of Retention in Ferroelectricity Boosted Gate Stacks for 3D NAND.

Laurent Breuil, Mihaela Popovici, J. Stiers, Antonio Arreghini, S. Ramesh, G. Van den Bosch, Jan Van Houdt, Maarten Rosmeulen

Proceedings of the IEEE International Memory Workshop, 2023

2022

Liquid Memory and the Future of Data Storage.

Maarten Rosmeulen, Cesar J. Lockhart de la Rosa, K. Willems, S. Fransen, B.-Y. Shih, Devin Verreck, V. Kalangi, F. Yasin, Harold Philipsen, Y. T. Set, N. Ronchi, W. Van Roy, O. Y. F. Henry, Antonio Arreghini, G. Van den Bosch, Arnaud Furnémont

Proceedings of the IEEE International Memory Workshop, 2022

At the Extreme of 3D-NAND Scaling: 25 nm Z-Pitch with 10 nm Word Line Cells.

S. Rachidi, Antonio Arreghini, Devin Verreck, G. L. Donadio, K. Banerjee, K. Katcko, Y. Oniki, G. Van den Bosch, Maarten Rosmeulen

Proceedings of the IEEE International Memory Workshop, 2022

High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reduction.

L. Breuil, L. Nyns, S. Rachidi, K. Banerjee, Antonio Arreghini, J. Bastos, S. Ramesh, G. Van den Bosch, Maarten Rosmeulen

Proceedings of the IEEE International Memory Workshop, 2022

2021

Reliability of Mo as Word Line Metal in 3D NAND.

Davide Tierno, Kristof Croes, Arjun Ajaykumar, Siva Ramesh, Geert Van den Bosch, Maarten Rosmeulen

Proceedings of the IEEE International Reliability Physics Symposium, 2021

A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics.

Franz Schanovsky, Devin Verreck, Antonio Arreghini, Gerhard Rzepa, Zlatan Stanojevic, Christian Kernstock, Oskar Baumgartner, Maarten Rosmeulen, Markus Karner

Proceedings of the IEEE International Memory Workshop, 2021

2018

Analysis and Design of a CMOS Ultra-High-Speed Burst Mode Imager with In-Situ Storage Topology Featuring In-Pixel CDS Amplification.

Lin-Kun Wu, David San Segundo Bello, Philippe Coppejans, Jan Craninckx, Andreas Süss, Maarten Rosmeulen, Piet Wambacq, Jonathan Borremans

Sensors, 2018

2016

Development of Gated Pinned Avalanche Photodiode Pixels for High-Speed Low-Light Imaging.

Tomislav Resetar, Koen De Munck, Luc Haspeslagh, Maarten Rosmeulen, Andreas Süss, Robert Puers, Chris Van Hoof

Sensors, 2016

2007

Characterization of charge trapping in SiO₂/Al₂O₃ dielectric stacks by pulsed C-V technique.

Giuseppina Puzzilli, Bogdan Govoreanu, Fernanda Irrera, Maarten Rosmeulen, Jan Van Houdt

Microelectron. Reliab., 2007

2002

An easy-to-use mismatch model for the MOS transistor.

Jeroen A. Croon, Maarten Rosmeulen, Stefaan Decoutere, Willy Sansen, Herman E. Maes

IEEE J. Solid State Circuits, 2002