Hao-Yu Chi

Orcid: 0000-0002-7719-0119

According to our database1, Hao-Yu Chi authored at least 13 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
On Reducing LDE Variations in Modern Analog Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

Invited Paper: 2023 ICCAD CAD Contest Problem B: 3D Placement with Macros.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
2022 ICCAD CAD Contest Problem B: 3D Placement with D2D Vertical Connections.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Practical Substrate Design Considering Symmetrical and Shielding Routes.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
A Style-Based Analog Layout Migration Technique With Complete Routing Behavior Preservation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Performance-driven Routing Methodology with Incremental Placement Refinement for Analog Layout Design.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Wire Load Oriented Analog Routing with Matching Constraints.
ACM Trans. Design Autom. Electr. Syst., 2020

Achieving Analog Layout Integrity through Learning and Migration Invited Talk.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
A Structure-Based Methodology for Analog Layout Generation.
Proceedings of the 16th International Conference on Synthesis, 2019

Achieving Routing Integrity in Analog Layout Migration via Cartesian Detection Lines.
Proceedings of the International Conference on Computer-Aided Design, 2019

2018
Analog placement with current flow and symmetry constraints using PCP-SP.
Proceedings of the 55th Annual Design Automation Conference, 2018

Performance-preserved analog routing methodology via wire load reduction.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017


  Loading...