Heiner Giefers

According to our database, Heiner Giefers authored at least 24 papers between 2006 and 2018.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2018

A hardware compilation framework for text analytics queries.

Raphael Polig, Kubilay Atasu, Heiner Giefers, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, H. Peter Hofstee

J. Parallel Distributed Comput., 2018

Extending the POWER Architecture with Transprecision Co-Processors.

Heiner Giefers, Dionysios Diamantopoulos

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

ecTALK: Energy efficient coherent transprecision accelerators - The bidirectional long short-term memory neural network case.

Dionysios Diamantopoulos, Heiner Giefers, Christoph Hagleitner

Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

2016

Measuring and Modeling the Power Consumption of Energy-Efficient FPGA Coprocessors for GEMM and FFT.

Heiner Giefers, Raphael Polig, Christoph Hagleitner

J. Signal Process. Syst., 2016

A fast, hybrid, power-efficient high-precision solver for large linear systems based on low-precision hardware.

Christoph M. Angerer, Raphael Polig, D. Zegarac, Heiner Giefers, Christoph Hagleitner, Costas Bekas, Alessandro Curioni

Sustain. Comput. Informatics Syst., 2016

NanoStreams: Codesigned microservers for edge analytics in real time.

Giorgis Georgakoudis, Charles Gillan, Ahmad Hassan, Umar Ibrahim Minhas, Ivor T. A. Spence, George Tzenakis, Hans Vandierendonck, Roger F. Woods, Dimitrios S. Nikolopoulos, Murali Shyamsundar, Paul Barber, Matthew Russell, Angelos Bilas, Stelios Kaloutsakis, Heiner Giefers, Peter W. J. Staar, Costas Bekas, Neil Horlock, Richard Faloon, Colin Pattison

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Analyzing the energy-efficiency of sparse matrix multiplication on heterogeneous systems: A comparative study of GPU, Xeon Phi and FPGA.

Heiner Giefers, Peter W. J. Staar, Costas Bekas, Christoph Hagleitner

Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

Stochastic Matrix-Function Estimators: Scalable Big-Data Kernels with High Performance.

Peter W. J. Staar, Panagiotis Kl. Barkoutsos, Roxana Istrate, A. Cristiano I. Malossi, Ivano Tavernelli, Nikolaj Moll, Heiner Giefers, Christoph Hagleitner, Costas Bekas, Alessandro Curioni

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016

Energy-efficient stochastic matrix function estimator for graph analytics on FPGA.

Heiner Giefers, Peter W. J. Staar, Raphael Polig

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015

Accelerating arithmetic kernels with coherent attached FPGA coprocessors.

Heiner Giefers, Raphael Polig, Christoph Hagleitner

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A soft-core processor array for relational operators.

Raphael Polig, Heiner Giefers, Walter Stechele

Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014

An FPGA-Based Reconfigurable Mesh Many-Core.

Heiner Giefers, Marco Platzner

IEEE Trans. Computers, 2014

Compiling text analytics queries to FPGAs.

Raphael Polig, Kubilay Atasu, Heiner Giefers, Laura Chiticariu

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system.

Heiner Giefers, Raphael Polig, Christoph Hagleitner

Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2013

Accelerating finite difference time domain simulations with reconfigurable dataflow computers.

Heiner Giefers, Christian Plessl, Jens Förstner

SIGARCH Comput. Archit. News, 2013

2012

Design and programming of reconfigurable mesh based many-cores.

Heiner Giefers

PhD thesis, 2012

2010

A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier.

Heiner Giefers, Marco Platzner

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics.

Heiner Giefers, Marco Platzner

Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010

2009

ARMLang: A language and compiler for programming reconfigurable mesh many-cores.

Heiner Giefers, Marco Platzner

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Program-driven fine-grained power management for the reconfigurable mesh.

Heiner Giefers, Marco Platzner

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

Realizing reconfigurable mesh algorithms on softcore arrays.

Heiner Giefers, Marco Platzner

Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

Reconfigurable many-cores with lean interconnect.

Heiner Giefers

Proceedings of the FPL 2008, 2008

2007

A Many-core Implementation based on the Reconfigurable Mesh Model.

Heiner Giefers, Marco Platzner

Proceedings of the FPL 2007, 2007

2006

Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture.

Heiner Giefers, Achim Rettberg

Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006