Hi-Keung Tony Ma

According to our database1, Hi-Keung Tony Ma authored at least 21 papers between 1986 and 2008.

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Bibliography

2008
On Efficient and Robust Constraint Generation for Practical Layout Legalization.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Cell Swapping Based Migration Methodology for Analog and Custom Layouts.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2005
Supporting sequential assumptions in hybrid verification.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2002
A practical and efficient method for compare-point matching.
Proceedings of the 39th Design Automation Conference, 2002

2001
Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines.
Proceedings of the 38th Design Automation Conference, 2001

1999
A Robust Solution to the Timing Convergence Problem in High-Performance Design.
Proceedings of the IEEE International Conference On Computer Design, 1999

1993
On the over-specification problem in sequential ATPG algorithms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1990
Irredundant sequential machines via optimal logic synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

Easily testable PLA-based finite state machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

Redundancies and don't cares in sequential logic synthesis.
J. Electron. Test., 1990

1989
Logic verification algorithms and their parallel implementation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

A synthesis and optimization procedure for fully and easily testable sequential machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

Easily testable PLA-based finite state machines.
Proceedings of the Nineteenth International Symposium on Fault-Tolerant Computing, 1989

1988
Test generation for sequential circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

MUSTANG: state assignment of finite state machines targeting multilevel logic implementations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

On the verification of sequential machines at differing levels of abstraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

Techniques for multilayer channel routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

An Incomplete Scan Design Approach to Test Generation for Sequential Machines.
Proceedings of the Proceedings International Test Conference 1988, 1988

Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines.
Proceedings of the Proceedings International Test Conference 1988, 1988

1986
Mixed-level fault coverage estimation.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

Chameleon: a new multi-layer channel router.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986


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