Hideko Oodaira

According to our database, Hideko Oodaira authored at least 2 papers between 1994 and 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1995

A 35 ns cycle time 3.3 V only 32 Mb NAND flash EEPROM.

Yoshihisa Iwata, Ken-ichi Imamiya, Yoshihisa Sugiura, Hiroshi Nakamura, Hideko Oodaira, Masaki Momodomi, Yasuo Itoh, Toshiharu Watanabe, Hitoshi Araki, Kazuhito Narita, Kazunori Masuda, Junichi Miyamoto

IEEE J. Solid State Circuits, November, 1995

1994

A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memory.

Tomoharu Tanaka, Yoshiyuki Tanaka, Hiroshi Nakamura, Koji Sakui, Hideko Oodaira, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka, Hisashi Hara

IEEE J. Solid State Circuits, November, 1994