Riichiro Shirota

According to our database1, Riichiro Shirota authored at least 8 papers between 1993 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2018, "For contributions to the development of NAND flash memory".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Improvement of oxide reliability in NAND flash memories using tight endurance cycling with shorter idling period.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2006
Roadmap of the Flash Memory.
Proceedings of the 14th IEEE International Workshop on Memory Technology, 2006

2002
A 125-mm<sup>2</sup> 1-Gb NAND flash memory with 10-MByte/s program speed.
IEEE J. Solid State Circuits, 2002

Test and Repair of Non-Volatile Commodity and Embedded Memories (NAND Flash Memory).
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

1999
A 130-mm/<sup>2</sup>, 256-Mbit NAND flash with shallow trench isolation technology.
IEEE J. Solid State Circuits, 1999

1997
A compact on-chip ECC for low cost flash memories.
IEEE J. Solid State Circuits, 1997

1994
A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memory.
IEEE J. Solid State Circuits, November, 1994

1993
Reliability issues of flash memory cells.
Proc. IEEE, 1993


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