Hillel Miller

According to our database1, Hillel Miller authored at least 8 papers between 1999 and 2009.

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Bibliography

2009
An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2006
Extracting a Simplified View of Design Functionality Based on Vector Simulation.
Proceedings of the Hardware and Software, 2006

Reusable On-Chip System Level Verification for Simulation Emulation and Silicon.
Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

2004
SOC modeling methodology for architectural exploration and software development.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Evaluating and comparing simulation verification vs. formal verification approach on block level design.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

2000
Automatic Vector Generation Using Constraints and Biasing.
J. Electron. Test., 2000

1999
Saving Space by Fully Exploiting Invisible Transitions.
Formal Methods Syst. Des., 1999

Modeling design constraints and biasing in simulation using BDDs.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999


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