Hiroaki Tanizaki

According to our database1, Hiroaki Tanizaki authored at least 6 papers between 2001 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2019
A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications.
IEICE Trans. Electron., 2019

2012
A Variability Management Method for Software Configuration Files.
Proceedings of the 24th International Conference on Software Engineering & Knowledge Engineering (SEKE'2012), 2012

2008
Formalization and Consistency Checking of Changes of Software System Configurations Using Alloy.
Proceedings of the 15th Asia-Pacific Software Engineering Conference (APSEC 2008), 2008

2002
0.13-μm 32-Mb/64-Mb embedded DRAM core with high efficient redundancy and enhanced testability.
IEEE J. Solid State Circuits, 2002

A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001
A 1.0-V 230-MHz column access embedded DRAM for portable MPEG applications.
IEEE J. Solid State Circuits, 2001


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