Masanori Hayashikoshi

Orcid: 0000-0002-1962-4708

According to our database1, Masanori Hayashikoshi authored at least 14 papers between 1992 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
An Energy-Efficient Task Scheduling for Near Real-Time Systems on Heterogeneous Multicore Processors.
IEICE Trans. Inf. Syst., 2020

2019
A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications.
IEICE Trans. Electron., 2019

2018
Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications.
IEEE Trans. Multi Scale Comput. Syst., 2018

A Cost-Effective High Accuracy Auto-Trimming System without Tester Constraint for Low-End Embedded Flash Memory.
Proceedings of the International SoC Design Conference, 2018

2017
An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation.
IEICE Trans. Inf. Syst., 2017

Energy-aware task scheduling for near real-time periodic tasks on heterogeneous multicore processors.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

Low-power multi-sensor system with task scheduling and autonomous standby mode transition control for IoT applications.
Proceedings of the 2017 IEEE Symposium in Low-Power and High-Speed Chips, 2017

2016
An adaptive energy-efficient task scheduling under execution time variation based on statistical analysis.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Low-power multi-sensor system with normally-off sensing technology for IoT applications.
Proceedings of the International SoC Design Conference, 2016

2015
Energy-Efficient Continuous Task Scheduling for Near Real-Time Periodic Tasks.
Proceedings of the IEEE International Conference on Data Science and Data Intensive Systems, 2015

2014
Data-aware power management for periodic real-time systems with non-volatile memory.
Proceedings of the IEEE Non-Volatile Memory Systems and Applications Symposium, 2014

Normally-off MCU architecture for low-power sensor node.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

1993
Highly Reliable Testing of ULSI Memories with On-Chip Voltage-Down Converters.
IEEE Des. Test Comput., 1993

1992
A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992


  Loading...