Hiroshi Tsutsui
Orcid: 0000-0002-6280-2979
According to our database1,
Hiroshi Tsutsui
authored at least 62 papers
between 1992 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Power Consumption and Prototype Evaluation of IoT Devices for Environmental Monitoring Systems.
Proceedings of the 22nd International Symposium on Communications and Information Technologies, 2023
2022
Classification of Rich-Classes but Scarce-Samples Images via Multi-modeling: the Humpback Whale Epitome.
Proceedings of the 4th IEEE Global Conference on Life Sciences and Technologies, 2022
2020
WiFi Fingerprint Based Indoor Positioning Systems Using Estimated Reference Locations.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2020
An Evaluation of High-Throughput Scalable Radix-4 FFT Processor Architecture Using Fixed-Point Arithmetic.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2020
Wireless Channel Measurement System Using Zynq UltraScale+ RFSoC for MIMO and D2D Communication Systems.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2020
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2020
2019
An Architecture for Real-Time Retinex-Based Image Enhancement and Haze Removal and Its FPGA Implementation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019
An Evaluation of Stack Light Indicator Color Detection System Using Web Cameras for Automatic Production Lines.
Proceedings of the 2019 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2019
2018
Development of High Performance RF Modules Used in Real-time FHD Video Communication over 8x8 MIMO-OFDM System.
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018
Development of Real-time FHD Loss-Less Video Communication over an $8\times 8$ MIMO-OFDM System.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2018
2017
Proceedings of the 17th International Symposium on Communications and Information Technologies, 2017
2016
Processing time reduction of tone mapping based on iterative shrinkage smoothing using parallel processing.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2016
Image smoothing in the spatial domain using multigrid conjugate gradient methods based on accelerated iterative shrinkage.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2016
2015
An FPGA implementation of low-latency video transmission system using lossless and near-lossless line-based compression.
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
Image smoothing using spatial iterative methods based on accelerated iterative shrinkage.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2015
2014
Experimental validation of minimum operating-voltage-estimation for low supply voltage circuits.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Proceedings of the 6th International Symposium on Communications, 2014
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014
Computational cost analysis and implementation of accelerated iterative shrinkage smoothing.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2014
2013
Parallel Acceleration Scheme for Monte Carlo Based SSTA Using Generalized STA Processing Element.
IEICE Trans. Electron., 2013
A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis.
IEICE Trans. Electron., 2013
High-speed DFG-level SEU vulnerability analysis for applying selective TMR to resource-constrained CGRA.
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2013
Fast and memory-efficient GPU implementations of krylov subspace methods for efficient power grid analysis.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013
Hot-swapping architecture with back-biased testing for mitigation of permanent faults in functional unit array.
Proceedings of the Design, Automation and Test in Europe, 2013
A cost-effective selective TMR for heterogeneous coarse-grained reconfigurable architectures based on DFG-level vulnerability analysis.
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
ACM Trans. Embed. Comput. Syst., 2012
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012
Bayesian Estimation of Multi-Trap RTN Parameters Using Markov Chain Monte Carlo Method.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012
Statistical observations of NBTI-induced threshold voltage shifts on small channel-area devices.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Halo artifacts reduction method for variational based realtime retinex image enhancement.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2012
2011
A design strategy for sub-threshold circuits considering energy-minimization and yield-maximization.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
2010
Sequential importance sampling for low-probability and high-dimensional SRAM yield analysis.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
Proceedings of the 2009 IEEE Wireless Communications and Networking Conference, 2009
Proceedings of the 7th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2009
2008
An architecture of photo core transform in HD photo coding system for embedded systems of various bandwidths.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007
Proceedings of the 4th IEEE Consumer Communications and Networking Conference, 2007
Proceedings of the 4th IEEE Consumer Communications and Networking Conference, 2007
2006
Pedestrian Recognition in Far-Infrared Images by Combining Boosting-Based Detection and Skeleton-Based Stochastic Tracking.
Proceedings of the Advances in Image and Video Technology, First Pacific Rim Symposium, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Conference on Image Processing, 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004
2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Conference on Image Processing, 2002
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002
2001
A design of LUT-array-based PLD and a synthesis approach based on sum of generalized complex terms expression.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
1992
A Fundamental Study Of Measuring An Overall Direction-of-action Using A Suspended Weight.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 1992