Howard Tang

According to our database1, Howard Tang authored at least 11 papers between 2001 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
A 1 V 103 dB 3rd-Order Audio Continuous-Time ΔΣ ADC With Enhanced Noise Shaping in 65 nm CMOS.
IEEE J. Solid State Circuits, 2016

2015
A 400 nW Single-Inductor Dual-Input-Tri-Output DC-DC Buck-Boost Converter With Maximum Power Point Tracking for Indoor Photovoltaic Energy Harvesting.
IEEE J. Solid State Circuits, 2015

2014
A 5.8 nW 9.1-ENOB 1-kS/s Local Asynchronous Successive Approximation Register ADC for Implantable Medical Device.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A 0.42-V Input Boost dc-dc Converter With Pseudo-Digital Pulsewidth Modulation.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 1.33 µW 8.02-ENOB 100 kS/s Successive Approximation ADC With Supply Reduction Technique for Implantable Retinal Prosthesis.
IEEE Trans. Biomed. Circuits Syst., 2014

2013
A 400nW single-inductor dual-input-tri-output DC-DC buck-boost converter with maximum power point tracking for indoor photovoltaic energy harvesting.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2010
Analog-to-Digital Converter with energy recovery capability using adiabatic technique.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2004
Body ballast resistor enhances ESD robustness of deep sub-micron CMOS circuit.
Microelectron. J., 2004

2003
Silicide Optimization for Electrostatic Discharge Protection Devices in Sub-100 nm CMOS Circuit Design.
Proceedings of the International Conference on VLSI, 2003

2001
Compact Layout Rule Extraction for Latchup Prevention in a 0.25-?m Shallow-Trench-Isolation Silicided Bulk CMOS Process.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001


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