Hratch Mangassarian

According to our database, Hratch Mangassarian authored at least 15 papers between 2005 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Debugging RTL Using Structural Dominance.

Hratch Mangassarian, Bao Le, Andreas G. Veneris

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

2012

Maximum Circuit Activity Estimation Using Pseudo-Boolean Satisfiability.

Hratch Mangassarian, Andreas G. Veneris, Farid N. Najm

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Non-solution implications using reverse domination in a modern SAT-based debugging environment.

Bao Le, Hratch Mangassarian, Brian Keng, Andreas G. Veneris

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

On error tolerance and Engineering Change with Partially Programmable Circuits.

Hratch Mangassarian, Hiroaki Yoshida, Andreas G. Veneris, Shigeru Yamashita, Masahiro Fujita

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Debugging with dominance: On-the-fly RTL debug solution implications.

Hratch Mangassarian, Andreas G. Veneris, Duncan Exon Smith, Sean Safarpour

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010

Robust QBF Encodings for Sequential Circuits with Applications to Verification, Debug, and Test.

Hratch Mangassarian, Andreas G. Veneris, Marco Benedetti

IEEE Trans. Computers, 2010

Leveraging dominators for preprocessing QBF.

Hratch Mangassarian, Bao Le, Alexandra Goultiaeva, Andreas G. Veneris, Fahiem Bacchus

Proceedings of the Design, Automation and Test in Europe, 2010

2008

QBF-Based Formal Verification: Experience and Perspectives.

Marco Benedetti, Hratch Mangassarian

J. Satisf. Boolean Model. Comput., 2008

A succinct memory model for automated design debugging.

Brian Keng, Hratch Mangassarian, Andreas G. Veneris

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007

A general framework for subjective information extraction from unstructured English text.

Hratch Mangassarian, Hassan Artail

Data Knowl. Eng., 2007

A performance-driven QBF-based iterative logic array representation with applications to verification, debug and test.

Hratch Mangassarian, Andreas G. Veneris, Sean Safarpour, Marco Benedetti, Duncan Exon Smith

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Improved Design Debugging Using Maximum Satisfiability.

Sean Safarpour, Hratch Mangassarian, Andreas G. Veneris, Mark H. Liffiton, Karem A. Sakallah

Proceedings of the Formal Methods in Computer-Aided Design, 7th International Conference, 2007

Maximum circuit activity estimation using pseudo-boolean satisfiability.

Hratch Mangassarian, Andreas G. Veneris, Sean Safarpour, Farid N. Najm, Magdy S. Abadir

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Trace Compaction using SAT-based Reachability Analysis.

Sean Safarpour, Andreas G. Veneris, Hratch Mangassarian

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2005

On Statistical Timing Analysis with Inter- and Intra-Die Variations.

Hratch Mangassarian, Mohab Anis

Proceedings of the 2005 Design, 2005