Hsuan-Jung Hsu

According to our database1, Hsuan-Jung Hsu authored at least 6 papers between 2007 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2013
AC-Plus Scan Methodology for Small Delay Testing and Characterization.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2011
A Low-Jitter ADPLL via a Suppressive Digital Filter and an Interpolation-Based Locking Scheme.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A low-cost wireless interface with no external antenna and crystal oscillator for cm-range contactless testing.
Proceedings of the 48th Design Automation Conference, 2011

2010
AF-Test: Adaptive-Frequency Scan Test Methodology for Small-Delay Defects.
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2009
Resilient Self-V<sub>DD</sub>-Tuning Scheme With Speed-Margining for Low-Power SRAM.
IEEE J. Solid State Circuits, 2009

2007
Built-In Speed Grading with a Process-Tolerant ADPLL.
Proceedings of the 16th Asian Test Symposium, 2007


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