Hui Zhao

Orcid: 0000-0003-3683-4077

Affiliations:

University of North Texas, TX, USA
Pennsylvania State University, PA, USA (PhD)

According to our database¹, Hui Zhao authored at least 30 papers between 2010 and 2022.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2022

Task Scheduling Strategy for Heterogeneous Multicore Systems.

[BibT_eX]

[DOI]

IEEE Consumer Electron. Mag., 2022

Improving GPU Throughput through Parallel Execution Using Tensor Cores and CUDA Cores.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021

Distance-in-time versus distance-in-space.

[BibT_eX]

[DOI]

Mahmut Taylan Kandemir

Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021

APCNN: Explore Multi-Layer Cooperation for CNN Optimization and Acceleration on FPGA.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020

Exploration on Task Scheduling Strategy for CPU-GPU Heterogeneous Computing System.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

A Low-Cost Conflict-Free NoC Architecture for Heterogeneous Multicore Systems.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing.

[BibT_eX]

[DOI]

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

AMOEBA: a coarse grained reconfigurable architecture for dynamic GPU scaling.

[BibT_eX]

[DOI]

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

Collective Affinity Aware Computation Mapping.

[BibT_eX]

[DOI]

Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019

A Performance Conserving Approach for Reducing Memory Power Consumption in Multi-Core Systems.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2019

Broadcast-Based Hybrid Wired-Wireless NoC for Efficient Data Transfer in GPU of CE Systems.

[BibT_eX]

[DOI]

Mohammadreza Robaei

Hui Zhao

IEEE Consumer Electron. Mag., 2019

Efficient Data Transfer in a Heterogeneous Multicore-Based CE Systems using Cache Performance Optimization.

[BibT_eX]

[DOI]

IEEE Consumer Electron. Mag., 2019

Dynamic Block Size Adjustment and Workload Balancing Strategy Based on CPU-GPU Heterogeneous Platform.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Intl Conf on Parallel & Distributed Processing with Applications, 2019

Exploration of System Configuration in Effective Training of CNNs on GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2019

Improving GPU NoC Power Efficiency through Dynamic Bandwidth Allocation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2019

A Low-Cost and Energy-Efficient NoC Architecture for GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/IEEE Symposium on Architectures for Networking and Communications Systems, 2019

2018

Computing with Near Data.

[BibT_eX]

[DOI]

Xulong Tang

Mahmut Taylan Kandemir

Hui Zhao

Myoungsoo Jung

Mustafa Karaköy

Proc. ACM Meas. Anal. Comput. Syst., 2018

Designing Scalable Hybrid Wireless NoC for GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Exploration on Routing Configuration of HNoC with Reasonable Energy Consumption.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Packet pump: overcoming network bottleneck in on-chip interconnects for GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

DEMM: A Dynamic Energy-Saving Mechanism for Multicore Memories.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on Modeling, 2017

2015

Memory Row Reuse Distance and its Role in Optimizing Application Performance.

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2015

Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors.

[BibT_eX]

[DOI]

Proceedings of the 35th IEEE International Conference on Distributed Computing Systems, 2015

TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability.

[BibT_eX]

[DOI]

Hui Zhao

Mahmut T. Kandemir

Mary Jane Irwin

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2012

A hybrid NoC design for cache coherence optimization for chip multiprocessors.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Exploring performance-power tradeoffs in providing reliability for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Hui Zhao

Mahmut T. Kandemir

Mary Jane Irwin

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Feedback control based cache reliability enhancement for emerging multicores.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Exploring heterogeneous NoC design space.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010

A special-purpose compiler for look-up table and code generation for function evaluation.

[BibT_eX]

[DOI]

Yuanrui Zhang

Lanping Deng

Praveen Yedlapalli

Sai Prashanth Muralidhara

Proceedings of the Design, Automation and Test in Europe, 2010

Feedback control for providing QoS in NoC based multicores.

[BibT_eX]

[DOI]

Akbar Sharifi

Hui Zhao

Mahmut T. Kandemir

Proceedings of the Design, Automation and Test in Europe, 2010

Hui Zhao

Timeline

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