Jabeom Koo

According to our database1, Jabeom Koo authored at least 14 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
A 2-GHz FBAR-Based Transformer Coupled Oscillator Design With Phase Noise Reduction.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

2018
Design of 1.8-mW PLL-Free 2.4-GHz Receiver Utilizing Temperature-Compensated FBAR Resonator.
IEEE J. Solid State Circuits, 2018

A ± 1.55ppm Stable FBAR Reference Clock with Oven-Controlled Temperature Compensation.
J. Electr. Comput. Eng., 2018

2017
A 350uW 2GHz FBAR transformer coupled Colpitts oscillator with close-in phase noise reduction.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2015
25.9 A ±3ppm 1.1mW FBAR frequency reference with 750MHz output and 750mV supply.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
21.7 A 1.8mW PLL-free channelized 2.4GHz ZigBee receiver utilizing fixed-LO temperature-compensated FBAR resonator.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
A 0.008 mm<sup>2</sup> 500 µW 469 kS/s Frequency-to-Digital Converter Based CMOS Temperature Sensor With Process Variation Compensation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A 1.6mW 300mV-supply 2.4GHz receiver with -94dBm sensitivity for energy-harvesting applications.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A -173 dBc/Hz @ 1 MHz offset Colpitts oscillator using AlN contour-mode MEMS resonator.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2010
An Antiharmonic, Programmable, DLL-Based Frequency Multiplier for Dynamic Frequency Scaling.
IEEE Trans. Very Large Scale Integr. Syst., 2010

2009
A Low-Power Programmable DLL-Based Clock Generator With Wide-Range Antiharmonic Lock.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

A Fast-lock Synchronous Multi-phase Clock Generator based on a Time-to-digital Converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Small-area high-accuracy ODT/OCD by calibration of global on-chip for 512M GDDR5 application.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009


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