Jan Andersson

Orcid: 0000-0003-2292-3722

According to our database1, Jan Andersson authored at least 13 papers between 1995 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
De-RISC: A Complete RISC-V Based Space-Grade Platform.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2020
The importance of reaction time, cognition, and meta-cognition abilities for drivers with visual deficits.
Cogn. Technol. Work., 2020

Development of a NOEL-V RISC-V SoC Targeting Space Applications.
Proceedings of the 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2020

2017
Design and Implementation of a Time Predictable Processor: Evaluation With a Space Case Study.
Proceedings of the 29th Euromicro Conference on Real-Time Systems, 2017

2016
Contention-aware performance monitoring counte support for real-time MPSoCs.
Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016


Random modulo: a new processor cache design for real-time critical systems.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2010
The novel mGluR5 radioligand [<sup>11</sup>C]AZ11696415: Palladium mediated <sup>11</sup>C-cyanation and initial in vivo characterization in the cynomolgus monkey brain using positron emission tomography (PET).
NeuroImage, 2010

2008
[<sup>11</sup>C]AZ10419369: A selective 5-HT<sub>1B</sub> receptor radioligand suitable for positron emission tomography (PET). Characterization in the primate brain.
NeuroImage, 2008

2007
Comparing measurements of shared situational awareness in a microworld with a developmental environment.
Proceedings of the 10th IFAC/IFIP/IFORS/IEA Symposium on Analysis, 2007

1998
Working Memory and Visual Speech Communication.
Proceedings of the Auditory-Visual Speech Processing, 1998

1995
A DSP ASIC design flow based on VHDL and ASIC-emulation.
Proceedings of the Proceedings EURO-DAC'95, 1995


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