According to our database1, Eren Kursun authored at least 35 papers between 2002 and 2017.
Legend:Book In proceedings Article PhD thesis Other
Thermomechanical Stress-Aware Management for 3-D IC Designs.
IEEE Trans. VLSI Syst., 2017
IEEE Trans. VLSI Syst., 2017
Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensors.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
Security Threats and Countermeasures in Three-Dimensional Integrated Circuits.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Thermal-aware 3D design for side-channel information leakage.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2013
Exploring the vulnerability of CMPs to soft errors with 3D stacked nonvolatile memory.
Thermomechanical stress-aware management for 3D IC designs.
Proceedings of the Design, Automation and Test in Europe, 2013
Fast poisson solvers for thermal analysis.
ACM Trans. Design Autom. Electr. Syst., 2012
Spatial and temporal thermal characterization of stacked multicore architectures.
An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Exploring the effects of on-chip thermal variation on high-performance multicore architectures.
Energy-Aware Accounting and Billing in Large-Scale Computing Facilities.
IEEE Micro, 2011
Characterizing Power and Temperature Behavior of POWER6-Based System.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designs.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Exploring the vulnerability of CMPs to soft errors with 3D stacked non-volatile memory.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
Design, CAD and technology challenges for future processors: 3D perspectives.
Proceedings of the 48th Design Automation Conference, 2011
Trends and techniques for energy efficient architectures.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Power-efficient, reliable microprocessor architectures: modeling and design methods.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Power and thermal characterization of POWER6 system.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010
Temperature Variation Characterization and Thermal Management of Multicore Architectures.
IEEE Micro, 2009
Opportunities and Challenges for 3D Systems and Their Design.
IEEE Design & Test of Computers, 2009
Investigating the effects of fine-grain three-dimensional integration on microarchitecture design.
Is 3D chip technology the next growth engine for performance improvement?
IBM Journal of Research and Development, 2008
Variation-aware thermal characterization and management of multi-core architectures.
Proceedings of the 26th International Conference on Computer Design, 2008
Fine grain 3D integration for microarchitecture design through cube packing exploration.
Proceedings of the 25th International Conference on Computer Design, 2007
An Evaluation of Deeply Decoupled Cores.
J. Instruction-Level Parallelism, 2006
Early Quality Assessment for Low Power Behavioral Synthesis.
J. Low Power Electronics, 2005
Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Low-Overhead Core Swapping for Thermal Management.
Proceedings of the Power-Aware Computer Systems, 4th International Workshop, 2004
Transistor Level Budgeting for Power Optimization.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
Global resource sharing for synthesis of control data flow graphs on FPGAs.
Proceedings of the 40th Design Automation Conference, 2003
Predictability in RT-Level Designs.
Journal of Circuits, Systems, and Computers, 2002
Early evaluation techniques for low power binding.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002