Jinjiang Yang

According to our database, Jinjiang Yang authored at least 16 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

16.2 A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical Problems.

Yihong Zhu, Wenping Zhu, Yi Ouyang, Junwen Sun, Min Zhu, Qi Zhao, Jinjiang Yang, Chen Chen, Qichao Tao, Guang Yang, Aoyang Zhang, Shaojun Wei, Leibo Liu

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022

More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network.

Bo Liu, Hao Cai, Zilong Zhang, Xiaoling Ding, Ziyu Wang, Yu Gong, Weiqiang Liu, Jinjiang Yang, Zhen Wang, Jun Yang

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An energy-efficient dynamically reconfigurable cryptographic engine with improved power/EM-side-channel-attack resistance.

Chenchen Deng, Min Zhu, Jinjiang Yang, Youyu Wu, Jiaji He, Bohan Yang, Jianfeng Zhu, Shouyi Yin, Shaojun Wei, Leibo Liu

Sci. China Inf. Sci., 2022

Forward Private Multi-Client Searchable Encryption with Efficient Access Control in Cloud Storage.

Jinjiang Yang, Feng Liu, Xinyi Luo, Jianan Hong, Jian Li, Kaiping Xue

Proceedings of the IEEE Global Communications Conference, 2022

2020

A High-throughput Low-area Entropy Source Based on Asynchronous Feedback Unit.

Ping Wang, Jinjiang Yang, Min Zhu, Bo Liu

Proceedings of the ICCSP 2020: 4th International Conference on Cryptography, 2020

2018

EERA-DNN: An energy-efficient reconfigurable architecture for DNNs with hybrid bit-width and logarithmic multiplier.

Zhen Wang, Mengwen Xia, Bo Liu, Xing Ruan, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang

IEICE Electron. Express, 2018

A Power Analysis Attack Countermeasure Based on Random Execution.

Shenghua Chen, Wei Ge, Jinjiang Yang, Bo Liu, Jun Yang

Proceedings of the 17th IEEE International Conference On Trust, 2018

An Energy-efficient Reconfigurable Hybrid DNN Architecture for Speech Recognition with Approximate Computing.

Bo Liu, Shisheng Guo, Hai Qin, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

2017

Context Management Scheme Optimization of Coarse-Grained Reconfigurable Architecture for Multimedia Applications.

Peng Cao, Bo Liu, Jinjiang Yang, Jun Yang, Meng Zhang, Longxing Shi

IEEE Trans. Very Large Scale Integr. Syst., 2017

E-ERA: An energy-efficient reconfigurable architecture for RNNs using dynamically adaptive approximate computing.

Bo Liu, Wei Dong, Tingting Xu, Yu Gong, Wei Ge, Jinjiang Yang, Longxing Shi

IEICE Electron. Express, 2017

An energy-efficient accelerator for hybrid bit-width DNNs.

Bo Liu, Xing Ruan, Mengwen Xia, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang

Proceedings of the 2017 IEEE Symposium Series on Computational Intelligence, 2017

Processing LSTM in memory using hybrid network expansion model.

Yu Gong, Tingting Xu, Bo Liu, Wei Ge, Jinjiang Yang, Jun Yang, Longxing Shi

Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

2016

An area-efficient design of reconfigurable S-box for parallel implementation of block ciphers.

Jinjiang Yang, Ge Wei, Peng Cao, Jun Yang

IEICE Electron. Express, 2016

High performance and area efficiency design of global register file for coarse-grained reconfigurable cryptographic processor.

Ge Wei, Jinjiang Yang, Jun Yang

IEICE Electron. Express, 2016

A Novel Design of Pipeline MDC-FFT Processor Based on Various Memory Access Mechanism.

Jinjiang Yang, Dongming Zhang, Yu Gong, Bo Liu

Proceedings of the International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2016

2012

Hybrid-Priority Configuration Cache Supervision Method for Coarse Grained Reconfigurable Architecture.

Bo Liu, Peng Cao, Jinjiang Yang

Proceedings of the 2012 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2012