Changhyeon Kim

According to our database1, Changhyeon Kim authored at least 31 papers between 2013 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
A 0.22-0.89 mW Low-Power and Highly-Secure Always-On Face Recognition Processor With Adversarial Attack Prevention.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

A 0.5V, 6.2μW, 0.059mm<sup>2</sup> Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance Sensing.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019
UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision.
IEEE J. Solid State Circuits, 2019

A 2.1TFLOPS/W Mobile Deep RL Accelerator with Transposable PE Array and Experience Compression.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

An Ultra-Low-Power Analog-Digital Hybrid CNN Face Recognition Processor Integrated with a CIS for Always-on Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector.
IEEE J. Solid State Circuits, 2018

Parameterised codebook design based on channel statistics for efficient multi-rank MIMO transmission.
IET Commun., 2018

Low-Power Scalable 3-D Face Frontalization Processor for CNN-Based Face Recognition in Mobile Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

A Codebook with Adjustable Angular Coverage for MIMO Spatial Channel Distributions.
Proceedings of the 88th IEEE Vehicular Technology Conference, 2018

B-Face: 0.2 MW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

UNPU: A 50.6TOPS/W unified deep neural network accelerator with 1b-to-16b fully-variable weight bit-precision.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 46.1 fps Global Matching Optical Flow Estimation Processor for Action Recognition in Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Edge-Based Robust RGB-D Visual Odometry Using 2-D Edge Divergence Minimization.
Proceedings of the 2018 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2018

2017
Low-Power Convolutional Neural Network Processor for a Face-Recognition System.
IEEE Micro, 2017

A 502-GOPS and 0.984-mW Dual-Mode Intelligent ADAS SoC With Real-Time Semiglobal Matching and Intention Prediction for Smart Automotive Black Box System.
IEEE J. Solid State Circuits, 2017

Time-efficient dense visual 12-DoF state estimator using RGB-D camera.
Proceedings of the 14th International Conference on Ubiquitous Robots and Ambient Intelligence, 2017

14.6 A 0.62mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A 0.53mW ultra-low-power 3D face frontalization processor for face recognition with human-level accuracy in wearable devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A Real-Time and Energy-Efficient Embedded System for Intelligent ADAS with RNN-Based Deep Risk Prediction using Stereo Camera.
Proceedings of the Computer Vision Systems - 11th International Conference, 2017

An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applications.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Convergence-enhanced dense RGB-D odometry with a rotational motion prior from a gyroscope.
Proceedings of the 11th Asian Control Conference, 2017

2016
A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

14.2 A 502GOPS and 0.984mW dual-mode ADAS SoC with RNN-FIS engine for intention prediction in automotive black-box system.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

A 43.7 mW 94 fps CMOS image sensor-based stereo matching accelerator with focal-plane rectification and analog census transformation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An intelligent ADAS processor with real-time semi-global matching and intention prediction for 720p stereo vision.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

An energy-efficient parallel multi-core ADAS processor with robust visual attention and workload-prediction DVFS for real-time HD stereo stream.
Proceedings of the 2016 IEEE Symposium in Low-Power and High-Speed Chips, 2016

2015
A parallel migration scheme for fast virtual machine relocation on a cloud cluster.
J. Supercomput., 2015

A Wearable EEG-HEG-HRV Multimodal System With Simultaneous Monitoring of tES for Mental Health Management.
IEEE Trans. Biomed. Circuits Syst., 2015

21.9 A wearable EEG-HEG-HRV multimodal system with real-time tES monitoring for mental health management.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A multimodal stress monitoring system with canonical correlation analysis.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2013
A Resource Reduction Scheme with Low Migration Frequency for Virtual Machines on a Cloud Cluster.
KSII Trans. Internet Inf. Syst., 2013


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