Sanghoon Kang
Orcid: 0000-0001-6557-2083
According to our database1,
Sanghoon Kang
authored at least 38 papers
between 2007 and 2023.
Collaborative distances:
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Bibliography
2023
A Mobile 3-D Object Recognition Processor With Deep-Learning-Based Monocular Depth Estimation.
IEEE Micro, 2023
DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC.
IEEE J. Solid State Circuits, 2023
2022
TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A Pipelined Point Cloud Based Neural Network Processor for 3-D Vision With Large-Scale Max Pooling Layer Prediction.
IEEE J. Solid State Circuits, 2022
FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems.
IEEE J. Solid State Circuits, 2022
DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
DSPU: A 281.6mW Real-Time Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022
2021
An Energy-Efficient GAN Accelerator With On-Chip Training for Domain-Specific Optimization.
IEEE J. Solid State Circuits, 2021
GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation.
IEEE J. Solid State Circuits, 2021
IEICE Trans. Inf. Syst., 2021
An Overview of Sparsity Exploitation in CNNs for On-Device Intelligence With Software-Hardware Cross-Layer Optimizations.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices.
IEEE Trans. Circuits Syst., 2020
A Power-Efficient CNN Accelerator With Similar Feature Skipping for Face Recognition in Mobile Devices.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation.
IEEE Trans. Circuits Syst., 2020
A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
A 4.45 ms Low-Latency 3D Point-Cloud-Based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS.
IEEE J. Solid State Circuits, 2019
UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision.
IEEE J. Solid State Circuits, 2019
A Full HD 60 fps CNN Super Resolution Processor with Selective Caching based Layer Fusion for Mobile Devices.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 2.1TFLOPS/W Mobile Deep RL Accelerator with Transposable PE Array and Experience Compression.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 15.2 TOPS/W CNN Accelerator with Similar Feature Skipping for Face Recognition in Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-Time Image Segmentation on Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 2019 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, 2019
2018
Low-Power Scalable 3-D Face Frontalization Processor for CNN-Based Face Recognition in Mobile Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
B-Face: 0.2 MW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
UNPU: A 50.6TOPS/W unified deep neural network accelerator with 1b-to-16b fully-variable weight bit-precision.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A 46.1 fps Global Matching Optical Flow Estimation Processor for Action Recognition in Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
14.6 A 0.62mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A 0.53mW ultra-low-power 3D face frontalization processor for face recognition with human-level accuracy in wearable devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2014
A 0.65V 1.2mW 2.4GHz/400MHz dual-mode phase modulator for mobile healthcare applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2007
Comput. Biol. Chem., 2007