Jo C. Ebergen

Affiliations:
  • Oracle Labs, Redwood Shores, CA, USA
  • Sun Microsystems Laboratories, Palo Alto, CA, USA
  • University of Waterloo, Department of Computer Science, ON, Canada
  • Eindhoven University, The Netherlands (PhD 1987)


According to our database1, Jo C. Ebergen authored at least 34 papers between 1989 and 2016.

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Bibliography

2016
Formal verification of division and square root implementations, an Oracle report.
Proceedings of the 2016 Formal Methods in Computer-Aided Design, 2016

2015
Radix-2 Division Algorithms with an Over-Redundant Digit Set.
IEEE Trans. Computers, 2015

2012
An Asynchronous Divider Implementation.
Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011
An Evaluation of Asynchronous Stacks.
IEEE Des. Test Comput., 2011

Long-Distance On-chip Communication Using GasP.
Proceedings of the 17th IEEE International Symposium on Asynchronous Circuits and Systems, 2011

2008
08371 Summary - Fault-Tolerant Distributed Algorithms on VLSI Chips.
Proceedings of the Fault-Tolerant Distributed Algorithms on VLSI Chips, 07.09., 2008

08371 Abstracts Collection - Fault-Tolerant Distributed Algorithms on VLSI Chips.
Proceedings of the Fault-Tolerant Distributed Algorithms on VLSI Chips, 07.09., 2008

2007
Circuit Techniques to Enable 430Gb/s/mm2 Proximity Communication.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Notes On Pulse Signaling.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006
An Asynchronous High-Throughput Control Circuit For Proximity Communication.
Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2005
GasP Control for Domino Circuits.
Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005

2004
Transistor Sizing: How to Control the Speed and Energy Consumption of a Circuit.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

A Fast and Energy-Efficient Stack.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

2003
Circuits Without Clocks: What Makes Them Tick?
Proceedings of the Principles of Distributed Systems, 7th International Conference, 2003

2002
Composing Snippets.
Proceedings of the Concurrency and Hardware Design, Advances in Petri Nets, 2002

2001
Squaring the FIFO in GasP.
Proceedings of the 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 2001

2000
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

1999
Response-time properties of linear asynchronous pipelines.
Proc. IEEE, 1999

A Counterflow Pipeline Experiment.
Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 1999

1998
Modeling and comparing CMOS implementations of the C-element.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Predicting Performance of Micropipelines Using Charlie Diagrams.
Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March, 1998

1997
Optimizing CMOS Implementations of the C-element.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Response Time Properties of Some Asynchronous Circuits.
Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 1997

1996
Design and Analysis of Up-Down Counters.
Sci. Comput. Program., 1996

A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

1994
Delay-insensitive solutions to the committee problem.
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994

1993
Design and Analysis of Delay-Insensitive Modulo-<i>N</i> Counters.
Formal Methods Syst. Des., 1993

Solving a Mutual Exclusion Problem with the RGD Arbiter.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

1992
On the Delay-Sensitivity of Gate Networks.
IEEE Trans. Computers, 1992

Arbiters: An Exercise in Specifying and Decomposing Asynchronously Communicating Components.
Sci. Comput. Program., 1992

Modulo-N Counters: Design and Analysis of Delay-Insensitive Circuits.
Proceedings of the Designing Correct Circuits, 1992

1991
A Formal Approach to Designing Delay-Insensitive Circuits.
Distributed Comput., 1991

1990
A Derivation of a Serial-Parallel Multiplier.
Sci. Comput. Program., 1990

1989
Recent Developments in the Design of Asynchronous Circuits.
Proceedings of the Fundamentals of Computation Theory, 1989


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