Marly Roncken

Orcid: 0000-0002-3703-3856

According to our database1, Marly Roncken authored at least 33 papers between 1981 and 2023.

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Bibliography

2023
Flexible Compilation and Refinement of Asynchronous Circuits.
Proceedings of the 28th IEEE International Symposium on Asynchronous Circuits and Systems, 2023

2022
Flexible Active-Passive and Push-Pull Protocols.
IEEE Embed. Syst. Lett., 2022

2019
Mutual Exclusion Sizing for Hoi Polloi.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Hierarchical Approach to Self-Timed Circuit Verification.
Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018
Data-Loop-Free Self-Timed Circuit Verification.
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018

2017
A Framework for Asynchronous Circuit Modeling and Verification in ACL2.
Proceedings of the Hardware and Software: Verification and Testing, 2017

How to think about self-timed systems.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

2016
Modular Timing Constraints for Delay-Insensitive Systems.
J. Comput. Sci. Technol., 2016

2015
Naturalized Communication and Testing.
Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015

2010
Timing Verification of GasP Asynchronous Circuits: Predicted Delay Variations Observed by Experiment.
Proceedings of the Concurrency, 2010

Long-Range GasP with Charge Relaxation.
Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010

2007
Low Power and Energy Efficient Asynchronous Design.
J. Low Power Electron., 2007

Asynchronous on-Chip Communication: Explorations on the Intel PXA27x Processor Peripheral Bus.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2004
Rob Tristan Gerth: 1956?2003.
Proceedings of the Computer Aided Verification, 16th International Conference, 2004

2001
An asynchronous instruction length decoder.
IEEE J. Solid State Circuits, 2001

2000
Fsimac: a fault simulator for asynchronous sequential circuits.
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

1999
Defect-oriented testability for asynchronous ICs.
Proc. IEEE, 1999

CAD Directions for High Performance Asynchronous Circuits.
Proceedings of the 36th Conference on Design Automation, 1999

RAPPID: An Asynchronous Instruction Length Decoder.
Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 1999

1996
Test Quality of Asynchronous Circuits: A Defect-oriented Evaluation.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Optimal Scan for Pipelined Testing: An Asynchronous Foundation.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Asynchronous Design: Working the Fast Lane.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995
A single-rail re-implementation of a DCC error detector using a generic standard-cell library.
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995

1994
A fully asynchronous low-power error corrector for the DCC player.
IEEE J. Solid State Circuits, December, 1994

Asynchronous Circuits for Low Power: A DCC Error Corrector.
IEEE Des. Test Comput., 1994

Partial scan test for asynchronous circuits illustrated on a DCC error corrector.
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994

1993
Linear Test Times for Delay-Insensitive Circuits: a Compilation Strategy.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

Characterization and Evaluation of a Compiled Asynchronous IC.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

1991
The VLSI-programming language tangram and its translation into handshake circuits.
Proceedings of the conference on European design automation, 1991

1982
Procedures and concurrency: A study in proof.
Proceedings of the International Symposium on Programming, 1982

1981
A Proof System for Brinch Hansen's Distributed Processes.
Proceedings of the GI, 1981


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