Jong-Phil Hong

Orcid: 0000-0001-6322-8588

According to our database1, Jong-Phil Hong authored at least 16 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
High-Speed Light Detection Sensor for Hardware Security in Standard CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

2022
Compact SRAM-Based PUF Chip Employing Body Voltage Control Technique.
IEEE Access, 2022

2021
Design of High-Gain Sub-THz Regenerative Amplifiers Based on Double-G<sub>max</sub> Gain Boosting Technique.
IEEE J. Solid State Circuits, 2021

A Reconfigurable SRAM Based CMOS PUF With Challenge to Response Pairs.
IEEE Access, 2021

2020
High Power and High Frequency CMOS Oscillator With Source-to-Drain Coupling and Capacitive Load Reduction Circuit.
IEEE Access, 2020

A 100% Stable Sense-Amplifier-Based Physically Unclonable Function With Individually Embedded Non-Volatile Memory.
IEEE Access, 2020

A 247 and 272 GHz Two-Stage Regenerative Amplifiers in 65 nm CMOS with 18 and 15 dB Gain Based on Double-Gmax Gain Boosting Technique.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019
A 230-260-GHz Wideband and High-Gain Amplifier in 65-nm CMOS Based on Dual-Peak $G_{{\mathrm{max}}}$ -Core.
IEEE J. Solid State Circuits, 2019

2018
High Frequency Buffer-Feedback Oscillator With an RF Negative-Resistance Circuit.
IEEE Access, 2018

A 230-260GHz wideband amplifier in 65nm CMOS based on dual-peak Gmax-core.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Analysis of optical parity gates of generating Bell state for quantum information and secure quantum communication via weak cross-Kerr nonlinearity under decoherence effect.
Quantum Inf. Process., 2017

2016
A Low Power Buffer-Feedback Oscillator with Current Reused Structure.
IEICE Trans. Electron., 2016

2014
A low supply voltage and wide-tuned CMOS Colpitts VCO.
IEICE Electron. Express, 2014

2012
A 0.004mm<sup>2</sup> 250μW ΔΣ TDC with time-difference accumulator and a 0.012mm<sup>2</sup> 2.5mW bang-bang digital PLL using PRNG for low-power SoC applications.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2009
Low Phase NoiseG<sub>m</sub>-Boosted Differential Gate-to-Source Feedback Colpitts CMOS VCO.
IEEE J. Solid State Circuits, 2009

2007
360-µW/1 mW Complementary Cross-Coupled Differential Colpitts <i>LC</i>-VCO/QVCO in 0.25-µm CMOS.
IEICE Trans. Electron., 2007


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