Jason Kamran Eshraghian
Orcid: 0000-0002-5832-4054Affiliations:
- University of California at Santa Cruz, Department of Electrical and Computer Engineering, Santa Cruz, CA, US
- University of Michigan, Department of Electrical Engineering and Computer Science, Ann Arbor, MI, US (former)
- University of Western Australia, Perth, WA, Australia (former)
According to our database1,
Jason Kamran Eshraghian
authored at least 154 papers
between 1988 and 2024.
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Bibliography
2024
IEEE Trans. Emerg. Top. Comput., 2024
2023
Neuromorph. Comput. Eng., December, 2023
To Spike or Not to Spike: A Digital Hardware Perspective on Deep Learning Acceleration.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
Guest Editorial Dynamical Neuro-AI Learning Systems: Devices, Circuits, Architecture and Algorithms.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
PowerGAN: A Machine Learning Approach for Power Side-Channel Attack on Compute-in-Memory Accelerators.
Adv. Intell. Syst., December, 2023
Neurocomputing, November, 2023
Deep learning model to predict exercise stress test results: Optimizing the diagnostic test selection strategy and reduce wastage in suspected coronary artery disease patients.
Comput. Methods Programs Biomed., October, 2023
Proc. IEEE, September, 2023
Int. J. Bifurc. Chaos, June, 2023
Neuromorph. Comput. Eng., March, 2023
Neuromorphic Intermediate Representation: A Unified Instruction Set for Interoperable Brain-Inspired Computing.
CoRR, 2023
Surgical Gym: A high-performance GPU-based platform for reinforcement learning with surgical robots.
CoRR, 2023
Multitask Deep Learning for Accurate Risk Stratification and Prediction of Next Steps for Coronary CT Angiography Patients.
CoRR, 2023
Neuromorphic Neuromodulation: Towards the next generation of on-device AI-revolution in electroceuticals.
CoRR, 2023
NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking.
CoRR, 2023
CoRR, 2023
A deep learning approach to cardiovascular disease classification using empirical mode decomposition for ECG feature extraction.
Biomed. Signal Process. Control., 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 2023 International Conference on Neuromorphic Systems, 2023
A Qualitative Approach for the Design of a Locally Active Memristor Based Neuron Circuit.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
2022
Int. J. Bifurc. Chaos, December, 2022
Supplementary material: A multimodal AI system for out-of-distribution generalization of seizure identification.
Dataset, March, 2022
A Multimodal AI System for Out-of-Distribution Generalization of Seizure Identification.
IEEE J. Biomed. Health Informatics, 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Spice modelling of a tri-state memristor and analysis of its series and parallel characteristics.
IET Circuits Devices Syst., 2022
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
CoRR, 2022
The fine line between dead neurons and sparsity in binarized spiking neural networks.
CoRR, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Work in Progress: Neuromorphic Cytometry, High-throughput Event-based flow Flow-Imaging.
Proceedings of the 8th International Conference on Event-Based Control, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Low-Power Wireless Sensor Network Using Fine-Grain Control of Sensor Module Power Mode.
Sensors, 2021
Circuits Syst. Signal Process., 2021
IEEE Access, 2021
Naturalizing Neuromorphic Vision Event Streams Using Generative Adversarial Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
A Behavioral Model of Digital Resistive Switching for Systems Level DNN Acceleration.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical Applications.
IEEE Trans. Biomed. Circuits Syst., 2020
IEEE Instrum. Meas. Mag., 2020
Complementary Metal-Oxide Semiconductor and Memristive Hardware for Neuromorphic Computing.
Adv. Intell. Syst., 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Live Demonstration: Prosthesis Control Using a Real-Time Retina Cell Network Simulator.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Live Demonstration: Video-to-Spike Conversion Using a Real-Time Retina Cell Network Simulator.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
A Real-Time Retinomorphic Simulator Using a Conductance-Based Discrete Neuronal Network.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
A Novel Universal Interface for Constructing Memory Elements for Circuit Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Adaptive Precision CNN Accelerator Using Radix-X Parallel Connected Memristor Crossbars.
CoRR, 2019
Adaptive Precision CNN Accelerator Using Radix-X Parallel Connected Memristor Crossbars.
CoRR, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
Proceedings of the Handbook of Memristor Networks., 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
Formulation and Implementation of Nonlinear Integral Equations to Model Neural Dynamics Within the Vertebrate Retina.
Int. J. Neural Syst., 2018
Formulation and Implementation of Nonlinear Integral Equations to Model Neural Dynamics Within the Vertebrate Retina.
Int. J. Neural Syst., 2018
2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Proceedings of the 40th International Conference on Telecommunications and Signal Processing, 2017
Proceedings of the 40th International Conference on Telecommunications and Signal Processing, 2017
2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Modelling and analysis of signal flow platform implementation into retinal cell pathway.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
Modelling and analysis of signal flow platform implementation into retinal cell pathway.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
2014
High Fill Factor Low-Voltage CMOS Image Sensor Based on Time-to-Threshold PWM VLSI Architecture.
IEEE Trans. Very Large Scale Integr. Syst., 2014
2013
Proceedings of the 2013 IEEE Eighth International Conference on Intelligent Sensors, 2013
2012
Memristive Device Fundamentals and Modeling: Applications to Circuits and Systems Simulation.
Proc. IEEE, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines.
IEEE Trans. Very Large Scale Integr. Syst., 2011
CoRR, 2011
2010
3-D System-on-System (SoS) Biomedical-Imaging Architecture for Health-Care Applications.
IEEE Trans. Biomed. Circuits Syst., 2010
2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
2008
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
2006
EURASIP J. Adv. Signal Process., 2006
2005
Proceedings of the VLSI-SoC: From Systems To Silicon, 2005
2004
Proceedings of the High Speed Networks and Multimedia Communications, 2004
Proceedings of the High Speed Networks and Multimedia Communications, 2004
Reconfigurable Add/Drop Multiplexing Topology Employing Adaptive MicroPhotonic Technology.
Proceedings of the High Speed Networks and Multimedia Communications, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
SOC-B Design and Testing Technique of IS-95C CDMA Transmitter for Measurement of Electric Field Intensity using FPGA and ASIC.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Pixel Structure Effects on Crosstalk in Backwall Illuminated CMOS Compatible Photodiode Arrays.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
2001
Proceedings of the 24th Australasian Computer Science Conference (ACSC 2001), 29 January, 2001
2000
CMOS circuit for high-speed flexible read-out of CMOS imagers.
Proceedings of the Visual Communications and Image Processing 2000, 2000
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000
A high fill-factor native logarithmic pixel: Simulation, design and layout optimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
A dataflow-oriented VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Improving Binary Compatibility in VLIW Machines through Compiler Assisted Dynamic Rescheduling.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
Parallel Architecture for the Implementation of the Embedded Zerotree Wavelet Algorithm.
Proceedings of the 5th Australasian Computer Architecture Conference (ACAC 2000), 31 January, 2000
1999
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999
Massively parallel wavelet based video codec for an intelligent-pixel mobile multimedia communicator.
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999
Self-timed MESFET gallium arsenide circuit techniques for a direct digital frequency synthesiser.
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Massively Parallel Intelligent Pixel Implementation of a Zerotree Entropy Video Codec for Multimedia Communications.
Proceedings of the VLSI: Systems on a Chip, 1999
Self-Timed Techniques for Low-Power Digital Arithmetic in GaAs VLSI.
Proceedings of the VLSI: Systems on a Chip, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1998
Proceedings of the Knowledge-Based Intelligent Electronic Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Smart Pixel Implementation of a 2-D Parallel Nucleic Wavelet Transform for Mobile Multimedia Communications.
Proceedings of the 1998 Design, 1998
1997
A Tabular Method for Guard Strengthening, Symmetrization, and Operator Reduction for Martin's Asynchronous Design Methodology.
IEEE Trans. Computers, 1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997
Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997
Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997
1996
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996
Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996
1995
Proceedings of the Mobile Robots X, Philadephia, PA, USA, October 23, 1995, Proceedings, 1995
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995
A robust adaptive sliding mode tracking control using an RBF neural network for robotic manipulators.
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995
Proceedings of the Electronic Technology Directions to the Year 2000, 1995
Proceedings of the Electronic Technology Directions to the Year 2000, 1995
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995
1994
Proceedings of the 1994 International Conference on Robotics and Automation, 1994
Implementation of a CORDIC Processor for CFFT Computation in Gallium Arsenide Technology.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
1988
Basic VLSI design - systems and circuits (2. ed.).
Prentice Hall Silicon Systems Engineering Series, Prentice Hall, ISBN: 978-0-7248-0105-3, 1988