Dihu Chen

According to our database1, Dihu Chen authored at least 28 papers between 2011 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A Wide-Band Digital Lock-In Amplifier and Its Application in Microfluidic Impedance Measurement.
Sensors, 2019

Image Inpainting Based on Patch-GANs.
IEEE Access, 2019

Unsupervised Object-Level Image-to-Image Translation Using Positional Attention Bi-Flow Generative Network.
IEEE Access, 2019

Category-Level Adversaries for Semantic Domain Adaptation.
IEEE Access, 2019

Resetting-Label Network Based on Fast Group Loss for Person Re-Identification.
IEEE Access, 2019

2018
Improved Synthesis of Compressor Trees in High-Level Synthesis for Modern FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

A 3.3-MHz fast-response load-dependent-on/off-time buck-boost DC-DC converter with low-noise hybrid full-wave current sensor.
Microelectronics Journal, 2018

A New Circuit Topology for High-Performance Pulsed Time-of- Flight Laser Radar Receivers.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

An Output-Capacitorless Adaptively Biased Low-Dropout Regulator with Maximum 132-MHz UGF and Without Minimum Loading Requirement.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

A 70-nA 13-ppm/°C All-MOSFET Voltage Reference for Low-Power IoT Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A mechanism for detecting on-chip radio frequency interference of field-programmable gate array.
Integration, 2017

Improved Nauta transconductor for wideband intermediate-frequency gm-C filter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Improved Synthesis of Compressor Trees on FPGAs in High-Level Synthesis.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

A CMOS transceiver RFIC for China geo-radio standard.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A fast-response buck-boost DC-DC converter with constructed full-wave current sensor.
Proceedings of the International Symposium on Integrated Circuits, 2016

A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter.
Proceedings of the International Symposium on Integrated Circuits, 2016

2015
A CMOS Delta-Sigma PLL Transmitter with Efficient Modulation Bandwidth Calibration.
IEEE Trans. on Circuits and Systems, 2015

A tri-band, 2-RX MIMO, 1-TX TD-LTE CMOS transceiver.
Microelectronics Journal, 2015

A power-area-efficient, 3-band, 2-RX MIMO, TD-LTE receiver with direct-coupled ADC.
I. J. Circuit Theory and Applications, 2015

A Computer-Aided Diagnosis System for Dynamic Contrast-Enhanced MR Images Based on Level Set Segmentation and ReliefF Feature Selection.
Comp. Math. Methods in Medicine, 2015

Cascoded flipped voltage follower based output-capacitorless low-dropout regulator for SoCs.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Bleeding detection in wireless capsule endoscopy based on MST clustering and SVM.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

A 3.5-A buck DC-DC regulator with wire drop compensation for remote-loading applications.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
Combining shape regression model and isophotes curvature information for eye center localization.
Proceedings of the 7th International Conference on Biomedical Engineering and Informatics, 2014

2013
CSI-Based Indoor Localization.
IEEE Trans. Parallel Distrib. Syst., 2013

hJam: Attachment Transmission in WLANs.
IEEE Trans. Mob. Comput., 2013

A gradual scheduling framework for problem size reduction and cross basic block parallelism exploitation in high-level synthesis.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2011
1024-point pipeline FFT processor with pointer FIFOs based on FPGA.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011


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