Kah-Hyong Chang

According to our database, Kah-Hyong Chang authored at least 4 papers between 2012 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A rail-to-rail noise-shaping non-binary SAR ADC.

S. Saisundar, N. Yoshio, Kah-Hyong Chang

Proceedings of the International Symposium on Integrated Circuits, 2016

2015

A Configurable Architecture for Fast Moments Computation.

Kah-Hyong Chang, Paramesran Raveendran

J. Signal Process. Syst., 2015

An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing.

Xin Liu, Jun Zhou, Chao Wang, Kah-Hyong Chang, Jianwen Luo, Jingjing Lan, Lei Liao, Yat-Hei Lam, Yongkui Yang, Bo Wang, Xin Zhang, Wang Ling Goh, Tony Tae-Hyoung Kim, Minkyu Je

IEEE Trans. Circuits Syst. II Express Briefs, 2015

2012

Efficient Hardware Accelerators for the Computation of Tchebichef Moments.

Kah-Hyong Chang, Paramesran Raveendran, Barmak Honarvar Shakibaei Asli, Chern-Loon Lim

IEEE Trans. Circuits Syst. Video Technol., 2012