Kaoru Takasuka

According to our database1, Kaoru Takasuka authored at least 12 papers between 1998 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
A Low Power Pipelined ADC Using Capacitor and Opamp Sharing Technique With a Scheme to Cancel the Effect of Signal Dependent Kickback.
IEEE J. Solid State Circuits, 2009

A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver.
IEEE J. Solid State Circuits, 2009

2008
A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, -98 dB THD, and 79 dB SNDR.
IEEE J. Solid State Circuits, 2008

A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
Design of a rugged 60 V VDMOS transistor.
IET Circuits Devices Syst., 2007

2006
An Image Rejection Mixer with AI-Based Improved Performance for WCDMA Applications.
IEICE Trans. Electron., 2006

A 3V 110µW 3.1 ppm/°C curvature-compensated CMOS bandgap reference.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators.
IEEE J. Solid State Circuits, 2005

2003
An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions.
IEEE J. Solid State Circuits, 2003

2002
An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2000
An Evolutionary Approach to GHz Digital Systems.
Proceedings of the 2nd NASA / DoD Workshop on Evolvable Hardware (EH 2000), 2000

1998
Analogue EHW Chip for Intermediate Frequency Filters.
Proceedings of the Evolvable Systems: From Biology to Hardware, 1998


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