Karl Janson

According to our database, Karl Janson authored at least 5 papers between 2017 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Fault-Aware Performance Assessment Approach for Embedded Networks.

Jan Malburg, Karl Janson, Jaan Raik, Frank Dannemann

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

2018

AWAIT: An Ultra-Lightweight Soft-Error Mitigation Mechanism for Network-on-Chip Links.

Karl Janson, Rene Pihlak, Siavoosh Payandeh Azad, Behrad Niazmand, Gert Jervan, Jaan Raik

Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

Software-Level TMR Approach for On-Board Data Processing in Space Applications.

Karl Janson, Carl Johann Treudler, Thomas Hollstein, Jaan Raik, Maksim Jenihhin, Görschwin Fey

Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017

Comprehensive performance and robustness analysis of 2D turn models for network-on-chips.

Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Thilo Kogge, Jaan Raik, Gert Jervan, Thomas Hollstein

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

From online fault detection to fault management in Network-on-Chips: A ground-up approach.

Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Nevin George, Stephen Adeboye Oyeniran, Tsotne Putkaradze, Apneet Kaur, Jaan Raik, Gert Jervan, Raimund Ubar, Thomas Hollstein

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017